BhattacharjeeAbhishek

TLB Improvements for Chip Multiprocessors

MartonosiMargaret, LustigDaniel, BhattacharjeeAbhishek, 2013 .

Thread criticality predictors for dynamic performance, power, and resource management in chip multiprocessors

MartonosiMargaret, BhattacharjeeAbhishek, 2009 .

Efficient Address Translation for Architectures with Multiple Page Sizes

BhattacharjeeAbhishek, CoxGuilherme, 2017 .

Architectural support for address translation on GPUs

HsuLisa, BhattacharjeeAbhishek, PichaiBharath, 2014 .

Translation-Triggered Prefetching

BhattacharjeeAbhishek, 2017 .

Inter-core cooperative TLB for chip multiprocessors

MartonosiMargaret, BhattacharjeeAbhishek, 2010 .

Hardware Translation Coherence for Virtualized Systems

BhattacharjeeAbhishek, CoxGuilherme, YanZi, 2017 .