J.D. Warnock

A double-precision multiplier with fine-grained clock-gating support for a first-generation CELL processor

J.B. Kuang, T.C. Buchholtz, S.M. Dance, 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

The design and implementation of double-precision multiplier in a first-generation CELL processor

J.B. Kuang, T.C. Buchholtz, S.M. Dance, 2005, 2005 International Conference on Integrated Circuit Design and Technology, 2005. ICICDT 2005..