Bijan Alizadeh

Enhancing Hardware Trojan Detection Sensitivity Using Partition-Based Shuffling Scheme

Ahmad Shabani, Bijan Alizadeh, 2021, IEEE Transactions on Circuits and Systems II: Express Briefs.

PODEM: A low-cost property-based design modification for detecting Hardware Trojans in resource-constraint IoT devices

Ahmad Shabani, Bijan Alizadeh, B. Alizadeh, 2020, J. Netw. Comput. Appl..

Improving polynomial datapath debugging with HEDs

Masahiro Fujita, Zainalabedin Navabi, Payman Behnam, 2014, 2014 19th IEEE European Test Symposium (ETS).

Modular arithmetic decision procedure with auto-correction mechanism

Masahiro Fujita, Bijan Alizadeh, M. Fujita, 2009, 2009 IEEE International High Level Design Validation and Test Workshop.

FPGA-Based Implementation of a Real-Time Object Recognition System Using Convolutional Neural Network

Bijan Alizadeh, Ali Azarmi Gilan, Mohammad Emad, 2020, IEEE Transactions on Circuits and Systems II: Express Briefs.

Automated formal approach for debugging dividers using dynamic specification

Hannu Tenhunen, Pasi Liljeberg, Amir-Mohammad Rahmani, 2014, 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT).

Incremental SAT-Based Correction of Gate Level Circuits by Reusing Partially Corrected Circuits

Bijan Alizadeh, Yasaman Abadi, 2020, IEEE Transactions on Circuits and Systems II: Express Briefs.

Groebner basis based formal verification of large arithmetic circuits using Gaussian elimination and cone-based polynomial extraction

Farimah Farahmandi, Bijan Alizadeh, B. Alizadeh, 2015, Microprocess. Microsystems.

Optimization of modular multiplication on FPGA using don't care conditions

Masahiro Fujita, Bijan Alizadeh, 2009, 2009 International Conference on Field-Programmable Technology.

Dynamic Flip-Flop conversion to tolerate process variation in low power circuits

Ali Afzali-Kusha, Bijan Alizadeh, Mehrzad Nejat, 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).