S. Downey

Integration of a mechanically reliable 65-nm node technology for low-k and ULK interconnects with various substrate and package types

V. Fiori, S. Orain, C. Goldberg, 2005, Proceedings of the IEEE 2005 International Interconnect Technology Conference, 2005..

3D Multi Scale Modeling of Wire Bonding Induced Peeling in Cu/Low-k Interconnects: Application of an Energy Based Criteria and Correlations with Experiments

V. Fiori, S. Orain, S. Gallois-Garreignot, 2007, 2007 Proceedings 57th Electronic Components and Technology Conference.

Gold Wire Bonding Induced Peeling in Cu/Low-k Interconnects: 3D Simulation and Correlations

V. Fiori, S. Orain, S. Gallois-Garreignot, 2007, 2007 International Conference on Thermal, Mechanical and Multi-Physics Simulation Experiments in Microelectronics and Micro-Systems. EuroSime 2007.

Manufacturability and Speed Performance Demonstration of Porous ULK (k=2.5) for a 45nm CMOS Platform

M. Haond, P. Ferreira, C. Cregut, 2007, 2007 IEEE Symposium on VLSI Technology.