Marcelo Lubaszewski

发表

Designing self-exercising analogue checkers

Vladimir Kolarik, Marcelo Lubaszewski, Bernard Courtois, 1994, Proceedings of IEEE VLSI Test Symposium.

Diversity TMR: Proof of concept in a mixed-signal case

Marcelo Lubaszewski, Gabriel de M. Borges, Luiz F. Goncalves, 2010, 2010 11th Latin American Test Workshop.

A CAT Tool for Frequency-domain Testing and Diagnosis on Analog

Marcelo Lubaszewski, Érika F. Cota, José Di Elias Domênico, 1997, J. Braz. Comput. Soc..

Testing the interconnect networks and I/O resources of field programmable analog arrays

Antonio Andrade, Marcelo Lubaszewski, Florence Azaïs, 2005, 23rd IEEE VLSI Test Symposium (VTS'05).

Concepção de Circuitos e Sistemas Integrados

Marcelo Lubaszewski, Renato P. Ribas, André Inácio Reis, 2001, RITA.

Low power, high-sensitivity clock recovery circuit for LF/HF RFID applications

Fernando da Rocha Paixão Cortes, Marcelo Lubaszewski, Rafael Cantalice, 2015, 2015 28th Symposium on Integrated Circuits and Systems Design (SBCCI).

Guest Editorial

Marcelo Lubaszewski, Víctor H. Champac, M. Lubaszewski, 2001, J. Electron. Test..

Exploring design diversity redundancy to improve resilience in mixed-signal systems

Marcelo Lubaszewski, Tiago R. Balen, Fernanda Gusmão de Lima Kastensmidt, 2015, Microelectron. Reliab..

Concurrent test of Network-on-Chip interconnects and routers

Marcelo Lubaszewski, Fernanda Lima Kastensmidt, Marcos Herve, 2010, 2010 11th Latin American Test Workshop.

Can Functional Test Achieve Low-cost Full Coverage of NoC Faults?

Marcelo Lubaszewski, 2009, 2009 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems.

Design of an embedded system for the proactive maintenance of electrical valves

Marcelo Lubaszewski, Luiz Fernando Gonçalves, Jefferson Luiz Bosa, 2009, SBCCI.

An Automated Verification Process Based on Scan Techniques

Marcelo Lubaszewski, Gustavo R. Alves, Margrit R. Krug, 2000 .

A cryptography core tolerant to DFA fault attacks

Marcelo Lubaszewski, Érika F. Cota, Carlos Roberto Moratelli, 2006, SBCCI '06.

Thermal monitoring of safety-critical integrated systems

Márta Rencz, Marcelo Lubaszewski, Bernard Courtois, 1996, Proceedings of the Fifth Asian Test Symposium (ATS'96).

A pragmatic test and diagnosis methodology for partially testable MCMs

Marcelo Lubaszewski, Meryem Marzouki, Mohamed Hedi Touati, 1994, Proceedings of IEEE Multi-Chip Module Conference (MCMC-94).

Testing the configurable analog blocks of field programmable analog arrays

Antonio Andrade, Marcelo Lubaszewski, Florence Azaïs, 2004, 2004 International Conferce on Test.

Test planning and design space exploration in a core-based environment

Luigi Carro, Marcelo Lubaszewski, Érika F. Cota, 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

Implementing a Self- Checking PROFIBUS Slave

Marcelo Lubaszewski, José M.F. Ferreira, Gustavo R. Alves, 2000 .

Wrapper design for the reuse of a bus, network-on-chip, or other functional interconnect as test access mechanism

Alexandre M. Amory, Fernando Gehm Moraes, Kees G. W. Goossens, 2007, IET Comput. Digit. Tech..

Improving yield of torus nocs through fault-diagnosis-and-repair of interconnect faults

Marcelo Lubaszewski, Marcos Herve, Erika Cota, 2009, 2009 15th IEEE International On-Line Testing Symposium.

A Strategy for Optimal Test Point Insertion in Analog Cascaded Filters

Pascal Nouet, Marcelo Lubaszewski, Florence Azaïs, 2005, J. Electron. Test..

From Microelectronics to MEMS Testing

Salvador Mir, Marcelo Lubaszewski, Bernard Courtois, 2000 .

Using a software testing technique to identify registers for partial scan implementation

Marcelo Lubaszewski, Margrit R. Krug, Marcelo de Souza Moraes, 2006, SBCCI '06.

Built-in self-test of global interconnects of field programmable analog arrays

Marcelo Lubaszewski, Michel Renovell, Tiago R. Balen, 2005, Microelectron. J..

TI-BIST: a temperature independent analog BIST for switched-capacitor filters

Luigi Carro, Marcelo Lubaszewski, Florence Azaïs, 2000, Proceedings of the Ninth Asian Test Symposium.

Test and Diagnosis of Communication Channels

Marcelo Lubaszewski, Alexandre M. Amory, Érika Cota, 2012 .

Fault-based ATPG for linear analog circuits with minimal size multifrequency test sets

Salvador Mir, Marcelo Lubaszewski, Bernard Courtois, 1996, J. Electron. Test..

Design of self-checking fully differential circuits and boards

Salvador Mir, Vladimir Kolarik, Marcelo Lubaszewski, 2000, IEEE Trans. Very Large Scale Integr. Syst..

The impact of NoC reuse on the testing of core-based systems

Luigi Carro, Altamiro Amadeu Susin, Marcelo Lubaszewski, 2003, Proceedings. 21st VLSI Test Symposium, 2003..

Design-for-Test of Mixed-Signal Integrated Circuits

José Luis Huertas, Marcelo Lubaszewski, 2004, 2006 49th IEEE International Midwest Symposium on Circuits and Systems.

Fault prediction in electrical valves using temporal Kohonen maps

Paulo Martins Engel, Marcelo Lubaszewski, Luiz F. Goncalves, 2010, 2010 11th Latin American Test Workshop.

A Multi-Mode Signature Analyzer for Analog and Mixed Circuits

Salvador Mir, Marcelo Lubaszewski, Florence Azaïs, 1997 .

A low-power RF/analog front-end architecture for LF passive RFID tags with dynamic power sensing

Fernando da Rocha Paixão Cortes, Marcelo Lubaszewski, Rafael Cantalice, 2014, 2014 IEEE International Conference on RFID (IEEE RFID).

A broad strategy to detect crosstalk faults in network-on-chip interconnects

Luigi Carro, Marcelo Lubaszewski, Érika F. Cota, 2010, 2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip.

Reliable fail-safe systems

Marcelo Lubaszewski, Bernard Courtois, 1993, Proceedings of 1993 IEEE 2nd Asian Test Symposium (ATS).

MOSFET stacked-pair test structure for mismatch evaluation by estimating the on-resistance ratio

Sergio Bampi, Marcelo Lubaszewski, Juan Pablo Martinez Brito, 2015, 2015 International Workshop on CMOS Variability (VARI).

Contributions to the evaluation of ensembles of combinational logic gates

Marcelo Lubaszewski, Renato P. Ribas, André Inácio Reis, 2011, Microelectron. J..

Automatic test generation for maximal diagnosis of linear analog circuits

Salvador Mir, Vladimir Kolarik, Marcelo Lubaszewski, 1996, Proceedings ED&TC European Design and Test Conference.

XI Brazilian Symposium on Integrated Circuit Design : proceedinga : September 30-October 3, 1998, Armação de Búzios, Rio de Janeiro, Brazil

Marcelo Lubaszewski, Vladimir Castro Alves, Simpósio de Concepção de Circuitos Integrados, 1999 .

On the Synthesis of Analog Cascaded Filters with Optimal Test Point Insertion

Pascal Nouet, Marcelo Lubaszewski, Florence Azaïs, 2003 .

Test and Design-for-Test: from Circuits to Integrated Systems

Marcelo Lubaszewski, M. Lubaszewski, 2006 .

Testing of RF mixers with adaptive filters

Luigi Carro, Marcelo Lubaszewski, André C. Nácul, 2002 .

Bridging A Gap Between Microelectronics And Micromechanics Testing

Marcelo Lubaszewski, 1998, Proceedings Seventh Asian Test Symposium (ATS'98) (Cat. No.98TB100259).

Task mapping on NoC-based MPSoCs with faulty tiles: Evaluating the energy consumption and the application execution time

Alexandre M. Amory, Fernando Gehm Moraes, César A. M. Marcon, 2011, 2011 22nd IEEE International Symposium on Rapid System Prototyping.

Efficiently using data splitting and retransmission to tolerate faults in networks-on-chip interconnects

Marcelo Lubaszewski, Érika F. Cota, Fernanda Gusmão de Lima Kastensmidt, 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

2012 JETTA Reviewers

Luigi Carro, Fernando Morgado Dias, Irith Pomeranz, 2013, J. Electron. Test..

Reusing an on-chip network for the test of core-based systems

Luigi Carro, Marcelo Lubaszewski, Érika F. Cota, 2004, TODE.

Systems-on-Chip Testing

Marcelo Lubaszewski, Alexandre M. Amory, Érika Cota, 2012 .

Built-in self-test approaches for analogue and mixed-signal integrated circuits

Salvador Mir, Marcelo Lubaszewski, Bernard Courtois, 1995, 38th Midwest Symposium on Circuits and Systems. Proceedings.

Improving mixed-single SOC testing: a power-aware reuse-based approach with analog BIST

Antonio Andrade, Marcelo Lubaszewski, Érika F. Cota, 2004, Proceedings. SBCCI 2004. 17th Symposium on Integrated Circuits and Systems Design (IEEE Cat. No.04TH8784).

A New FPGA for DSP Applications Integrating BIST Capabilities

Luigi Carro, Marcelo Lubaszewski, Michel Renovell, 2004, J. Electron. Test..

Microsystems testing: an approach and open problems

Marcelo Lubaszewski, Bernard Courtois, Érika F. Cota, 1998, Proceedings Design, Automation and Test in Europe.

Neutron-Induced Single Event Effect in Mixed-Signal Flash-Based FPGA

Marcelo Lubaszewski, Tiago R. Balen, Fernanda Lima Kastensmidt, 2016 .

Low cost test architecture for mixed-signal integrated circuits

Marcelo Lubaszewski, Julio L. da Silva, Emerson Camargo, 2014, 19th Annual International Mixed-Signals, Sensors, and Systems Test Workshop Proceedings.

An approach to the on-line testing of operational amplifiers

Jaime Velasco-Medina, Marcelo Lubaszewski, Michael Nicolaidis, 1998, Proceedings Seventh Asian Test Symposium (ATS'98) (Cat. No.98TB100259).

A method to diagnose faults in linear analog circuits using an adaptive tester

Luigi Carro, Marcelo Lubaszewski, Érika F. Cota, 1999, Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078).

Fault-based testing and diagnosis of balanced filters

Salvador Mir, Marcelo Lubaszewski, Bernard Courtois, 1996 .

On the design of self-checking boundary scannable boards

Marcelo Lubaszewski, Bernard Courtois, 1992, Proceedings International Test Conference 1992.

Testing a PWM circuit using functional fault models and compact test vectors for operational amplifiers

Marcelo Lubaszewski, Vladimir Castro Alves, José Vicente Calvano, 2000, Proceedings of the Ninth Asian Test Symposium.

Low pin count DfT technique for RFID ICs

Marcelo Lubaszewski, Marcos Herve, Marcelo de Souza Moraes, 2012, 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT).

Design of Systems on a Chip

Marcelo Lubaszewski, Ricardo Reis, Jochen A. G. Jess, 2006 .

DfT for the Reuse of Networks-on-Chip as Test Access Mechanism

Alexandre M. Amory, Fernando Gehm Moraes, Marcelo Lubaszewski, 2007, 25th IEEE VLSI Test Symposium (VTS'07).

Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2008, Gramado, Brazil, September 1-4, 2008

Marcelo Lubaszewski, Michel Renovell, Rajesh Gupta, 2008, SBCCI.

Unifying test and diagnosis of interconnects and logic clusters in partial boundary scan boards

Marcelo Lubaszewski, Meryem Marzouki, Mohamed Hedi Touati, 1993, Proceedings of 1993 International Conference on Computer Aided Design (ICCAD).

ABILBO: Analog BuILt-in Block Observer

Salvador Mir, Marcelo Lubaszewski, Leandro Pulz, 1996, ICCAD 1996.

A Constraint-Based Solution for On-Line Testing of Processors Embedded in Real-Time Applications

Luigi Carro, Flávio Rech Wagner, Marcelo Lubaszewski, 2005, 2005 18th Symposium on Integrated Circuits and Systems Design.

Analog checkers with absolute and relative tolerances

Salvador Mir, Vladimir Kolarik, Marcelo Lubaszewski, 1995, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Unified built-in self-test for fully differential analog circuits

Salvador Mir, Marcelo Lubaszewski, Bernard Courtois, 1996, J. Electron. Test..

Proceedings of the XIIth conference on Integrated circuits and systems design

Ivan Saraiva Silva, Marcelo Lubaszewski, Vladimir Castro Alves, 1999 .

A multi-mode stimuli generator for analogue and mixed-signal built-in-self-test

Marcelo Lubaszewski, Florence Azaïs, Michel Renovell, 1998 .

A power management system architecture for LF passive RFID tags

Fernando da Rocha Paixão Cortes, Marcelo Lubaszewski, Alfredo Olmos, 2014, 2014 IEEE 5th Latin American Symposium on Circuits and Systems.

Built-in self-test and fault diagnosis of fully differential analogue circuits

Salvador Mir, Vladimir Kolarik, Marcelo Lubaszewski, 1994, ICCAD.

The Transient Reponse Analysis Method Applied to the Test of Field Programmable Analog Arrays: Feasibility Study

Marcelo Lubaszewski, Michel Renovell, Tiago R. Balen, 2005 .

Proceedings of the 21st annual symposium on Integrated circuits and system design

Rajesh Gupta, Marcelo Lubaszewski, Michel Renovell, 2008 .

Increasing reliability of programmable mixed-signal systems by applying design diversity redundancy

Marcelo Lubaszewski, Tiago R. Balen, Gabriel de M. Borges, 2010, 2010 15th IEEE European Test Symposium.

A Reliable Fail-Safe System

Marcelo Lubaszewski, Bernard Courtois, B. Courtois, 1998, IEEE Trans. Computers.

Reliability, Availability and Serviceability of Networks-on-Chip

Marcelo Lubaszewski, Erika Cota, Alexandre M. Amory, 2011 .

Selected Papers from the International Mixed Signals Testing and GHz/Gbps Test Workshop

Bozena Kaminska, Marcelo Lubaszewski, José Machado da Silva, 2008, VLSI Design.

Efficient test circuit to qualify logic cells

Marcelo Lubaszewski, Renato P. Ribas, André Inácio Reis, 2009, 2009 IEEE International Symposium on Circuits and Systems.

A Highly Reliable Wearable Device for Fall Detection

Marcelo Lubaszewski, João Carlos Britto Filho, 2020, 2020 IEEE Latin-American Test Symposium (LATS).

Mixed-signal circuits and boards for high safety applications

Salvador Mir, Vladimir Kolarik, Marcelo Lubaszewski, 1995, Proceedings the European Design and Test Conference. ED&TC 1995.

Test time reduction reusing multiple processors in a network-on-chip based architecture

Alexandre M. Amory, Fernando Gehm Moraes, Marcelo Lubaszewski, 2005, Design, Automation and Test in Europe.

NoC Reuse for SoC Modular Testing

Marcelo Lubaszewski, Alexandre M. Amory, Érika Cota, 2012 .

Synthesis method for testable electrical networks using 1st order building blocks

Marcelo Lubaszewski, Vladimir Castro Alves, Antonio Carneiro de Mesquita Filho, 2002 .

Searching for Global Test Costs Optimization in Core-Based Systems

Luigi Carro, Marcelo Lubaszewski, Érika F. Cota, 2004, J. Electron. Test..

Thermal Monitoring of Self-Checking Systems

Márta Rencz, Marcelo Lubaszewski, Bernard Courtois, 1998, J. Electron. Test..

Determining the test sources/sinks for NoC TAMs

Alexandre M. Amory, Fernando Gehm Moraes, Marcelo Lubaszewski, 2013, 2013 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

On-Line and Off-Line Testing: From Digital to Analog, from Circuits to Boards

Marcelo Lubaszewski, Bernard Courtois, 1995, ESSCIRC '95: Twenty-first European Solid-State Circuits Conference.

Designing for test analog signal processors for MEMS-based inertial sensors

Marcelo Lubaszewski, José Vicente Calvano, 2003, The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, 2003. Proceedings..

Functional Test of Mesh-Based NoCs with Deterministic Routing: Integrating the Test of Interconnects and Routers

Marcelo Lubaszewski, Érika F. Cota, Fernanda Gusmão de Lima Kastensmidt, 2011, J. Electron. Test..

A low-power RFID enabled temperature sensor for cold chain management

Marcelo Lubaszewski, Laurent Courcelle, Francisco O. O. Gomes, 2015, 2015 IEEE International Symposium on Circuits and Systems (ISCAS).

ABILBO: Analog BuILt-in block observer

Salvador Mir, Marcelo Lubaszewski, Leandro Pulz, 1996, Proceedings of International Conference on Computer Aided Design.

Effects of Radiation on Analog and Mixed-Signal Circuits

Luigi Carro, Marcelo Lubaszewski, Tiago R. Balen, 2007 .

Improving ATPG Gate-Level Fault Coverage by using Test Vectors generated from Behavioral HDL Descriptions

Marcelo Lubaszewski, Margrit R. Krug, Marcelo de Souza Moraes, 2006, VLSI-SoC.

Applying the Oscillation Test Strategy to FPAA’s Configurable Analog Blocks

Marcelo Lubaszewski, Florence Azaïs, Michel Renovell, 2005, J. Electron. Test..

Fault simulation of MEMS using HDLs

Salvador Mir, Marcelo Lubaszewski, Bernard Courtois, 1999, Design, Test, Integration, and Packaging of MEMS/MOEMS.

An approach to the built-in self-test of field programmable analog arrays

Antonio Andrade, Marcelo Lubaszewski, Florence Azaïs, 2004, 22nd IEEE VLSI Test Symposium, 2004. Proceedings..

Unifying test and diagnosis of interconnects and logic clusters in partial boundary scan boards

Marcelo Lubaszewski, Meryem Marzouki, Mohamed Hedi Touati, 1993, ICCAD.

Design of high-performance band-pass sigma-delta modulator with concurrent error detection

Salvador Mir, Marcelo Lubaszewski, V. Liberali, 1996, Proceedings of Third International Conference on Electronics, Circuits, and Systems.

Design and test of MEMS

Márta Rencz, Klaus Hofmann, Salvador Mir, 1999, Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013).

Evaluating energy consumption of homogeneous MPSoCs using spare tiles

Alexandre M. Amory, Fernando Gehm Moraes, César A. M. Marcon, 2011, 2011 Design, Automation & Test in Europe.

Synthesis of an 8051-Like Micro-Controller Tolerant to Transient Faults

Luigi Carro, Ricardo Reis, Marcelo Lubaszewski, 2000, J. Electron. Test..

A 2-transistor sub-1V low power temperature compensated CMOS voltage reference

Marcelo Lubaszewski, Alfredo Olmos, Juan Pablo Martinez Brito, 2014, 2014 27th Symposium on Integrated Circuits and Systems Design (SBCCI).

A New Frequency-domain Analog Test Generation Tool

Marcelo Lubaszewski, Erika Cota, Elias Jose Di Domenico, 1997 .

Error Location and Reconfiguration

Marcelo Lubaszewski, Alexandre M. Amory, Érika Cota, 2012 .

Le Test Unifi de Cartes appliqu ˆ la Conception de Systmes Fiables

Marcelo Lubaszewski, 1994 .

Fault modeling of suspended thermal MEMS

Salvador Mir, Marcelo Lubaszewski, Bernard Courtois, 1999, International Test Conference 1999. Proceedings (IEEE Cat. No.99CH37034).

Built-in Test of Analog Non-Linear Circuits in a SOC Environment

Luigi Carro, Marcelo Lubaszewski, André C. Nácul, 2001, VLSI-SOC.

Improving the yield of NoC-based systems through fault diagnosis and adaptive routing

Marcelo Lubaszewski, Érika F. Cota, Fernanda Gusmão de Lima Kastensmidt, 2011, J. Parallel Distributed Comput..

Wrapper Design for the Reuse of Networks-on-Chip as Test Access Mechanism

Alexandre M. Amory, Fernando Gehm Moraes, Kees G. W. Goossens, 2006, Eleventh IEEE European Test Symposium (ETS'06).

Applying Memory Test to Embedded Systems

Altamiro Amadeu Susin, Fabiano Hessel, Marcelo Lubaszewski, 2004 .

Concurrent error detection in analog and mixed-signal integrated circuits

Salvador Mir, Marcelo Lubaszewski, Adoración Rueda, 1995, 38th Midwest Symposium on Circuits and Systems. Proceedings.

Using Bulk Built-In Current Sensors and recomputing techniques to mitigate transient faults in microprocessors

Marcelo Lubaszewski, Marcos Herve, Gilson Wirth, 2009, 2009 10th Latin American Test Workshop.

A new test scheduling algorithm based on Networks-on-Chip as Test Access Mechanisms

Alexandre M. Amory, Fernando Gehm Moraes, Marcelo Lubaszewski, 2011, J. Parallel Distributed Comput..

Implementing a self-testing 8051 microprocessor

Luigi Carro, Altamiro Amadeu Susin, Marcelo Lubaszewski, 1999, Proceedings. XII Symposium on Integrated Circuits and Systems Design (Cat. No.PR00387).

Single Event Upset in SRAM-based Field Programmable Analog Arrays: Effects and Mitigation

Marcelo Lubaszewski, Michel Renovell, Tiago R. Balen, 2007, IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07).

Evaluating the effectiveness of a mixed-signal TMR scheme based on design diversity

Marcelo Lubaszewski, Tiago R. Balen, Gabriel de M. Borges, 2010, SBCCI '10.

Built-In Self-Test of Field Programmable Analog Arrays based on Transient Response Analysis

Marcelo Lubaszewski, Michel Renovell, Tiago R. Balen, 2007, J. Electron. Test..

A High-Fault-Coverage Approach for the Test of Data, Control and Handshake Interconnects in Mesh Networks-on-Chip

Alexandre M. Amory, Marcelo Lubaszewski, Érika F. Cota, 2008, IEEE Transactions on Computers.

Towards Self-Checking Mixed-Signal Integrated Circuits

Vladimir Kolarik, Marcelo Lubaszewski, Bernard Courtois, 1993, ESSCIRC '93: Nineteenth European Solid-State Circuits Conference.

Testing MEMS

Marcelo Lubaszewski, Andrew Richardson, Jean-Michel Karam, 1998, VTS.

Diagnosis of interconnect shorts in mesh NoCs

Marcelo Lubaszewski, Érika F. Cota, Fernanda Gusmão de Lima Kastensmidt, 2009, 2009 3rd ACM/IEEE International Symposium on Networks-on-Chip.

From Circuit Simulation to Circuit Verification: An Internal + Boundary- Scan-Based Solution

Marcelo Lubaszewski, José M.F. Ferreira, Gustavo Costa Alves, 2000 .

Reuse of existing resources for analog BIST of a switch capacitor filter.

Luigi Carro, Marcelo Lubaszewski, Florence Azaïs, 2000, DATE '00.

Fault detection in systems with 2nd order dynamics using transient analysis

Marcelo Lubaszewski, J. V. Calvano, V. C. Alves, 1999, Proceedings. XII Symposium on Integrated Circuits and Systems Design (Cat. No.PR00387).

Functional test of field programmable analog arrays

Marcelo Lubaszewski, Michel Renovell, Tiago R. Balen, 2006, 24th IEEE VLSI Test Symposium.

Reducing test time with processor reuse in network-on-chip based systems

Alexandre M. Amory, Fernando Gehm Moraes, Marcelo Lubaszewski, 2004, Proceedings. SBCCI 2004. 17th Symposium on Integrated Circuits and Systems Design (IEEE Cat. No.04TH8784).

Built-in Self-test And Fault Diagnosis Of Fully Differential Analogue Circuits

Salvador Mir, Marcelo Lubaszewski, Bernard Courtois, 1994, IEEE/ACM International Conference on Computer-Aided Design.

Redefining and testing interconnect faults in Mesh NoCs

Alexandre M. Amory, Marcelo Lubaszewski, Érika F. Cota, 2007, 2007 IEEE International Test Conference.

Advanced Approaches for NoC Reuse

Marcelo Lubaszewski, Alexandre M. Amory, Érika Cota, 2012 .

Radiation effects on programmable analog devices and mitigation techniques

Marcelo Lubaszewski, Tiago R. Balen, T. Balen, 2010, 2010 IEEE 16th International On-Line Testing Symposium.

A Self-Checking Scheme to Mitigate Single Event Upset Effects in SRAM-Based FPAAs

Marcelo Lubaszewski, Fernanda Lima Kastensmidt, T R Balen, 2008 .

Special session 12B: Embedded tutorial test and fault tolerance of networks-on-chip

Marcelo Lubaszewski, Érika F. Cota, 2010, 2010 28th VLSI Test Symposium (VTS).

Early estimation of wire length for dedicated test access mechanisms in networks-on-chip based SoCs

Alexandre M. Amory, Fernando Gehm Moraes, Marcelo Lubaszewski, 2011, SBCCI '11.

Guest editorial

Marcelo Lubaszewski, Andrew Richardson, C.C. Su, 2009, Microelectron. J..

NoC interconnection functional testing: Using boundary-scan to reduce the overall testing time

Marcelo Lubaszewski, Erika Cota, Fernanda L. Kastensmidt, 2009, 2009 10th Latin American Test Workshop.

Test and Diagnosis of Routers

Marcelo Lubaszewski, Alexandre M. Amory, Érika Cota, 2012 .

The ΣΔ-BIST Method Applied to Analog Filters

Luigi Carro, Marcelo Lubaszewski, L. Cassol, 2003, J. Electron. Test..

AConstraint-Based Solution forOn-Line Testing of Processors EmbeddedinReal-Time Applications

Luigi Carro, Flávio Rech Wagner, Marcelo Lubaszewski, 2005 .

A novel AES cryptographic core highly resistant to differential power analysis attacks

Marcelo Lubaszewski, Felipe Ghellar, 2008, SBCCI '08.

On-line test of a switching circuit

Marcelo Lubaszewski, J. A. Bastos, J. A. Kussler, 1999, Proceedings. XII Symposium on Integrated Circuits and Systems Design (Cat. No.PR00387).

Testing Chips with Mesh-Based Network-on-Chip

Alexandre M. Amory, Marcelo Lubaszewski, Fernando Moraes, 2009 .

Fault detection methodology and BIST method for 2nd order Butterworth, Chebyshev and Bessel filter approximations

Marcelo Lubaszewski, Vladimir Castro Alves, José Vicente Calvano, 2000, Proceedings 18th IEEE VLSI Test Symposium.

A power management system architecture for LF passive RFID tags

Marcelo Lubaszewski, Alfredo Olmos, Fernando Paixão Cortes, 2015 .

Filters designed for testability wrapped on the Mixed-Signal Test Bus

Marcelo Lubaszewski, Vladimir Castro Alves, Antônio C. Mesquita, 2002, Proceedings 20th IEEE VLSI Test Symposium (VTS 2002).

A brief on analogue on-line checkers

Salvador Mir, Marcelo Lubaszewski, V. Kolarik, 1994 .

An efficient design methodology for standard cell circuits

Marcelo Lubaszewski, Ricardo Reis, R. Gomes, 1988, 1988., IEEE International Symposium on Circuits and Systems.

SIFU!-a didactic stuck-at fault simulator

Marcelo Lubaszewski, André Inácio Reis, Vinícius P. Correia, 2003, Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03.

A scalable test strategy for network-on-chip routers

Alexandre M. Amory, Fernando Gehm Moraes, Marcelo Lubaszewski, 2005, IEEE International Conference on Test, 2005..

Design of Systems on a Chip: Design and Test

Marcelo Lubaszewski, Reis R. Lubaszewski, 2006 .

Guest Editorial

Marcelo Lubaszewski, Andrew Richardson, C. C. Su, 2007, J. Electron. Test..

Impact of TID-induced threshold deviations in analog building-blocks of operational amplifiers

Marcelo Lubaszewski, Tiago R. Balen, Guilherme S. Cardoso, 2012, 2012 13th Latin American Test Workshop (LATW).

Fault Detection, Diagnosis and Prediction in Electrical Valves Using Self-Organizing Maps

Marcelo Lubaszewski, Tiago R. Balen, Luiz Fernando Gonçalves, 2011, J. Electron. Test..

Frequency-based BIST for analog circuit testing

Bozena Kaminska, Marcelo Lubaszewski, Bernard Courtois, 1995, Proceedings 13th IEEE VLSI Test Symposium.

Power-aware noc reuse on the testing of core-based systems

Luigi Carro, Flávio Rech Wagner, Marcelo Lubaszewski, 2003, International Test Conference, 2003. Proceedings. ITC 2003..

Special Issue: Mixed-Technology Testing

Marcelo Lubaszewski, Andrew Richardson, C. C. Su, 2009 .

Journal of Electronic Testing: Theory and Applications (JETTA): Editorial

Marcelo Lubaszewski, Andrew Richardson, Chauchin Su, 2007 .

Neutron-induced single event effects analysis in a SAR-ADC architecture embedded in a mixed-signal SoC

Marcelo Lubaszewski, Tiago R. Balen, Fernanda Gusmão de Lima Kastensmidt, 2013, 2013 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

An analog-based approach for MEMS testing

Salvador Mir, Marcelo Lubaszewski, Bernard Courtois, 2001 .

Error Control Coding and Retransmission

Marcelo Lubaszewski, Alexandre M. Amory, Érika Cota, 2012 .

Fault Models and Test Generation for OpAmp Circuits—The FFM

Marcelo Lubaszewski, Vladimir Castro Alves, Antonio Carneiro de Mesquita Filho, 2001, J. Electron. Test..

Evaluating the scalability of test buses

Alexandre M. Amory, Fernando Gehm Moraes, Matheus T. Moreira, 2013, 2013 International Symposium on System on Chip (SoC).

Resource-and-time-aware test strategy for configurable quaternary logic blocks

Luigi Carro, Marcelo Lubaszewski, Érika F. Cota, 2009, SBCCI.

Within-die and die-to-die variability on 65nm CMOS : oscillators experimental results

Sergio Bampi, Marcelo Lubaszewski, Juan Pablo Martinez Brito, 2015, 2015 International Workshop on CMOS Variability (VARI).

Estimating Static Parameters of A-to-D Converters from Spectral Analysis

Marcelo Lubaszewski, Florence Azaïs, Mariane Comte, 2002 .

Circuit Design for Testing Standard Cell Libraries

André Ivanov, Marcelo Lubaszewski, Renato P. Ribas, 2011 .

A fault-tolerant, DFA-resistant AES core

Marcelo Lubaszewski, Érika F. Cota, Felipe Ghellar, 2008, 2008 IEEE International Symposium on Circuits and Systems.

A new adaptive analog test and diagnosis system

Luigi Carro, Marcelo Lubaszewski, Érika F. Cota, 2000, IEEE Trans. Instrum. Meas..

CAD tools and foundries to boost microsystems development

Manfred Glesner, Marcelo Lubaszewski, Bernard Courtois, 1998 .

Wrapper Design for the Reuse of Functional Interconnect for Test

Alexandre M. Amory, Erik Jan Marinissen, Marcelo Lubaszewski, .