M. Yasuhira

Dual-Port SOT-MRAM Achieving 90-MHz Read and 60-MHz Write Operations Under Field-Assistance-Free Condition

Yitao Ma, Takahiro Hanyu, Masaaki Niwa, 2020, IEEE Journal of Solid-State Circuits.

Dual-Port Field-Free SOT-MRAM Achieving 90-MHz Read and 60-MHz Write Operations under 55-nm CMOS Technology and 1.2-V Supply Voltage

T. Nasuno, T. Yoshiduka, M. Yasuhira, 2020, 2020 IEEE Symposium on VLSI Circuits.

Ultra-low thermal budget CMOS process for 65nm-node low-operation-power applications

M. Yasuhira, K. Kiyono, T. Arikado, 2003, IEEE International Electron Devices Meeting 2003.

First demonstration of field-free SOT-MRAM with 0.35 ns write speed and 70 thermal stability under 400°C thermal tolerance by canted SOT structure and its advanced patterning/SOT channel technology

T. Endoh, S. Fukami, S. Ikeda, 2019, 2019 IEEE International Electron Devices Meeting (IEDM).

Novel Quad interface MTJ technology and its first demonstration with high thermal stability and switching efficiency for STT-MRAM beyond 2Xnm

T. Endoh, S. Ikeda, S. Miura, 2019, 2019 Symposium on VLSI Technology.

High carrier velocity and reliability of quarter-micron SPI (Self-aligned Pocket Implantation) MOSFETs

M. Yasuhira, S. Akiyama, T. Hori, 1992, 1992 International Technical Digest on Electron Devices Meeting.