Philip W. Diodato

A simple embedded DRAM process for 0.16-/spl mu/m CMOS technologies

C. T. Liu, Philip W. Diodato, S. N. Rogers, 2000, 2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104).

A submicrometer NMOS multiplexer-demultiplexer chip set for 622.08-Mb/s SONET applications

Mihai Banu, Philip W. Diodato, H. T. Weston, 1992 .

Merged DRAM-logic in the year 2001

K.-H. Lee, Philip W. Diodato, W. W. Troutman, 1998, Proceedings. International Workshop on Memory Technology, Design and Testing (Cat. No.98TB100236).

An IEEE standard floating point chip

Peter M. Maurer, Philip W. Diodato, Thomas Ng, 1985, 1985 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

A reusable embedded DRAM macrocell

Philip W. Diodato, W. W. Troutman, W. S. Lindenberger, 1997, Proceedings of CICC 97 - Custom Integrated Circuits Conference.

Embedded DRAM: more than just a memory

Philip W. Diodato, 2000 .

A case study of RC effects to circuit performance

Philip W. Diodato, C. S. Pai, R. Liu, 1998, Proceedings of the IEEE 1998 International Interconnect Technology Conference (Cat. No.98EX102).