Jau-Yien Lee

发表

Solving linear systems of determinant frequently zero over finite field GF(2)

Jhing-Fa Wang, Jhing-Fa Wang, Jau-Yien Lee, 1989 .

The number of spanning trees of the generalized Boolean n-cube network

Jhing-Fa Wang, Jau-Yien Lee, Tsung-Chuan Huang, 1988 .

Programmable And Parallel Variable-length Decoder For Video Systems

J. Yang, Jau-Yien Lee, Dwu-Shian Ma, 1993, IEEE 1993 International Conference on Consumer Electronics Digest of Technical Papers.

A general mean-based iterative winner-take-all neural network

Jar-Ferr Yang, Chi-Ming Chen, Jau-Yien Lee, 1995, IEEE Trans. Neural Networks.

On the concurrent update and generation of the dynamic Huffman code

Jhing-Fa Wang, Jau-Yien Lee, Lian-Ying Liu, 1996, IEEE Trans. Signal Process..

Cam-Based VLSI Architectures for Dynamic Huffman Coding

Jhing-Fa Wang, Jau-Yien Lee, Liang-Ying Liu, 1994, IEEE International Conference on Consumer Electronics.

Dynamic mapping technique for adaptive Huffman code

Jhing-Fa Wang, Jau-Yien Lee, Liang-Wei Lee, 1993, Proceedings of TENCON '93. IEEE Region 10 International Conference on Computers, Communications and Automation.

The determination of the cycle length in high level synthesis

Jhing-Fa Wang, Ming-Hwa Sheu, Yuan-Long Jeang, 1993, Integr..

Bit-Parallel Systolic Multipliers for GF(2m) Fields Defined by All-One and Equally Spaced Polynomials

Chiou-Yng Lee, Erl-Huei Lu, Jau-Yien Lee, 2001, IEEE Trans. Computers.

A new threshold scheme and its application in designing the conference key distribution cryptosystem

Chi-Sung Laih, Lein Harn, Jau-Yien Lee, 1989, Inf. Process. Lett..

A topology-based component extractor for understanding electronic circuit diagrams

Jhing-Fa Wang, Chin-Shyurng Fahn, Jau-Yien Lee, 1988, Comput. Vis. Graph. Image Process..

An ASIC design for linear predictive coding of speech signals

Jhing-Fa Wang, Ming-Hwa Sheu, Yuan-Long Jeang, 1992, Proceedings Euro ASIC '92.

Parallel processing for Viterbi algorithm

Jau Yien Lee, Kuei Ann Wen, Jau-Yien Lee, 1988 .

Low complexity bit-parallel systolic architecture for computing C+AB2 over a class of GF(2m)

Erl-Huei Lu, Jau-Yien Lee, Yeun-Renn Ting, 2004, Integr..

Bit-parallel systolic modular multipliers for a class of GF(2/sup m/)

Chiou-Yng Lee, Erl-Huei Lu, Chiou-Yng Lee, 2001, Proceedings 15th IEEE Symposium on Computer Arithmetic. ARITH-15 2001.

New bit-parallel systolic multipliers for a class of GF(2/sup m/)

Chiou-Yng Lee, Erl-Huei Lu, Jau-Yien Lee, 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

Dynamic reblocking RSA-based multisignatures scheme for computer and communication networks

Erl-Huei Lu, Jau-Yien Lee, Shun-Fu Pon, 2002, IEEE Communications Letters.

Test generation for presettable synchronous sequential circuits

Jhing-Fa Wang, Pao-Chuan Chen, Tah-Yuan Kuo, 1989, International Symposium on VLSI Technology, Systems and Applications,.

Dynamic search-window adjustment and interlaced search for block-matching algorithm

Jhing-Fa Wang, Jau-Yien Lee, Liang-Wei Lee, 1993, IEEE Trans. Circuits Syst. Video Technol..

A New Approach to 3-D Robot Location with Single View

Jhing-Fa Wang, Jiann Der Lee, Jau Yien Lee, 1987 .

A new scheme for ID-based cryptosystem and signature

Chin-Hsing Chen, Chi-Sung Laih, Lein Harn, 1989, IEEE INFOCOM '89, Proceedings of the Eighth Annual Joint Conference of the IEEE Computer and Communications Societies.

High throughput pipelined data path synthesis by conserving the regularity of nested loops

Yu-Chin Hsu, Jhing-Fa Wang, Yuan-Long Jeang, 1993, Proceedings of 1993 International Conference on Computer Aided Design (ICCAD).

Random code chaining

Jau-Yien Lee, E. H. Lu, Pao-Chuan Chen, 1988 .

On the register allocation problems and algorithms

Jhing-Fa Wang, Jau Yien Lee, Ming Hwa Sheu, 1989, International Symposium on VLSI Technology, Systems and Applications,.