H. Terai

发表

A new design approach for control circuits of pipelined single-flux-quantum microprocessors

Y. Kamiya, Yuki Yamanashi, Nobuyuki Yoshikawa, 2006 .

Design and implementation of circuit components of the SFQ microprocessor, CORE1

Yuki Yamanashi, Nobuyuki Yoshikawa, F. Matsuzaki, 2004 .

Extracting ROI by using Eye Movement Analysis

K. Yamamoto, Y. Nakamura, H. Terai, 2005 .

Performance-Driven Floorplanning Technique Based on Collaboration of Software and Hardware

H. Terai, M. Fukui, M. Yoshikawa, 2005, 2005 IEEE Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications.

Architecture of virus evolutionary genetic algorithm for car navigation system

H. Terai, M. Yoshikawa, 2007, 2007 50th Midwest Symposium on Circuits and Systems.

Consideration of Logic Synthesis and Clock Distribution Networks for SFQ Logic Circuits

Yuki Yamanashi, Nobuyuki Yoshikawa, Akira Fujimaki, 2005 .

A GA-based timing-driven placement technique

H. Terai, M. Yoshikawa, 2005, Sixth International Conference on Computational Intelligence and Multimedia Applications (ICCIMA'05).

On-chip test of the shift register for high-end network switch based on cell-based design

Akira Fujimaki, Shinichi Yorozu, Yoshio Kameda, 2001 .

Evolutionary computation engine for floor-planning

H. Terai, M. Yoshikawa, 2004, (ICEEE). 1st International Conference on Electrical and Electronics Engineering, 2004..

Compression of CT images - Applying the Hybrid Coding

K. Yamamoto, Y. Nakamura, H. Terai, 2005 .

Dedicated Hardware Architecture for Partially Mapped Crossover

H. Terai, M. Yoshikawa, 2008, 2008 19th International Conference on Systems Engineering.

A New Pheromone Control Algorithm of Ant Colony Optimization

H. Terai, M. Yoshikawa, M. Fukui, 2008, 2008 International Conference on Smart Manufacturing Application.

Crosstalk-driven placement based on genetic algorithms

H. Terai, M. Yoshikawa, M. Yoshikawa, 2004, 2004 IEEE International Conference onComputational Intelligence for Measurement Systems and Applications, 2004. CIMSA..

A novel performance-driven placement based on hybrid genetic algorithm

H. Terai, M. Yoshikawa, 2005, IEEE International Conference Mechatronics and Automation, 2005.

Design of LSI for crossover operation based on sequence pair

H. Terai, M. Yoshikawa, 2006, 2006 International Symposium on Evolving Fuzzy Systems.

Dedicated hardware architecture for cycle crossover operation

H. Terai, M. Yoshikawa, K. Otsuka, 2008, 2008 First International Conference on the Applications of Digital Information and Web Technologies (ICADIWT).

Architecture for high speed evolutionary learning

H. Terai, M. Yoshikawa, 2003, ASIC, 2003. Proceedings. 5th International Conference on.

Hybrid genetic algorithm engine for high-speed floorplanning

H. Terai, M. Yoshikawa, 2005, Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005..

Automatic placement algorithms for VLSI with cellular approach and its evaluation

Chihei Miura, Tatsuki Ishii, H. Terai, 1984 .