Panagiota Vatsolaki

Stratakis: "vc-level flow control and shared buffering in the telegraphos switch

Manolis Katevenis, Panagiota Vatsolaki, Aristides Efthymiou, 1995 .

Design of a High-Speed UART VLSI Library Cell

Panagiota Vatsolaki, Panagiota Vatsolaki, 1992 .

The Remote Enqueue Operation on Networks of Workstations

Evangelos P. Markatos, Panagiota Vatsolaki, Manolis Katevenis, 1999, Informatica.

Pipelined multi-queue management in a VLSI ATM switch chip with credit-based flow-control

Christoforos E. Kozyrakis, George Kornaros, Manolis Katevenis, 1997, Proceedings Seventeenth Conference on Advanced Research in VLSI.

EWOS: A sealed-bid auction system design and implementation for electricity interonnector capacity allocation

Panagiota Vatsolaki, Alexios Tsalpatouros, 2013, IISA 2013.

Pipelined memory shared buffer for VLSI switches

Aristides Efthymiou, Manolis Katevenis, Panagiota Vatsolaki, 1995, SIGCOMM '95.

ATLAS I: implementing a single-chip ATM switch with backpressure

George Kornaros, Dionisios N. Pnevmatikatos, Dimitrios N. Serpanos, 1999, IEEE Micro.

AT LAS I: AS ingle-Chip ATM Switch with HIC Links and Multi-Lane Back-Pressure

Manolis Katevenis, Panagiota Vatsolaki, 1996 .

ON OPTIMIZING ATLAS I, A 10GBPS ATM SWITCH

Manolis Katevenis, Panagiota Vatsolaki, Georgios Kornaros, 2000 .

ATLAS: A Single-Chip ATM Switch for NOWs

Evangelos P. Markatos, Dimitrios N. Serpanos, Manolis Katevenis, 1997, CANPC.