J. Davis

An efficient method for modeling the effect of implant damage on NMOS devices using effective profiles and device simulation

S. Saxena, K. Vasanth, S. List, 1996, International Electron Devices Meeting. Technical Digest.

Physical oxide thickness extraction and verification using quantum mechanical simulation

G. Klimeck, A. Chatterjee, Gerhard Klimeck, 1997, International Electron Devices Meeting. IEDM Technical Digest.

Silicide-related yield enhancement in a deep submicrometer CMOS process

R. Solis, J. Davis, S. Qian, 2001, 2001 IEEE International Symposium on Semiconductor Manufacturing. ISSM 2001. Conference Proceedings (Cat. No.01CH37203).

The Impact of Size Effects and Copper Interconnect Process Variations on the Maximum Critical Path Delay of Single and Multi-Core Microprocessors

R. Murali, R. Sarvari, J. Meindl, 2007, 2007 IEEE International Interconnect Technology Conferencee.