C. Y. Roger Chen

发表

A heuristic for data path synthesis using multiport memories

Imtiaz Ahmad, C. Y. Roger Chen, 1992, [1992] Proceedings of the Second Great Lakes Symposium on VLSI.

LILA: layout generation for iterative logic arrays

C. Y. Roger Chen, Qinghong Wu, Bradley S. Carlson, 1995, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

A hierarchical methodology to improve channel routing by pin permutation

C. Y. Roger Chen, Cliff Yungchin Hou, 1991, 1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers.

MMBP [ X ] / G /1 queues and their application to the approximation of the performance of ATM switches

C. Y. Roger Chen, Mowcheng Lee, Bao-Shuh P. Lin, 1996 .

Synthesis of application-specific multiprocessor systems

Imtiaz Ahmad, C. Y. Roger Chen, Muhammad K. Dhodhi, 1994, Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC.

An object-oriented cell library manager

C. Y. Roger Chen, John M. Acken, Naresh Sehgal, 1994, ICCAD '94.

Techniques for video indexing

C. Y. Roger Chen, Dikran S. Meliksetian, Larry J. Liu, 1996, Other Conferences.

New architecture for MPEG-2 real-time encoding

C. Y. Roger Chen, Dikran S. Meliksetian, Mansour Zuair, 1997, Electronic Imaging.

Communication Aspects of the Cube Connected Cycles

C. Y. Roger Chen, Dikran S. Meliksetian, 1990, ICPP.

Detailed placement with net length constraints

C. Y. Roger Chen, C. Y. Chen, Naresh Sehgal, 2003, The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, 2003. Proceedings..

Transistor Chaining in Static CMOS Functional Cells of Arbitrary Planar Topology

C. Y. Roger Chen, Bradley S. Carlson, Dikran S. Meliksetian, 1999, Discret. Appl. Math..

A new model for the performance evaluation of synchronous circuit switched multistage interconnection networks

C. Y. Roger Chen, Abdulaziz S. Almazyad, Shuo-Hsien Hsiao, 1995, TNET.

A queueing analysis of the performance of DQDB

C. Y. Roger Chen, Dikran S. Meliksetian, Georges A. Makhoul, 1995, TNET.

Path enumeration & redundancy removal for timing optimization

Chilukuri K. Mohan, C. Y. Roger Chen, Nancy Khoury, 2009 .

A high performance general purpose multi-point signal router

C. Y. Roger Chen, John M. Acken, Naresh Kumar Seghal, 1994, Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94.

Performance analysis of communications in static interconnection networks

C. Y. Roger Chen, Dikran S. Meliksetian, 1992, SIGMETRICS '92/PERFORMANCE '92.

Design of a multimedia object-oriented DBMS

C. Y. Roger Chen, L. J. Liu, Dikran S. Meliksetian, 2005, Multimedia Systems.

TOBOL-a new methodology for the top-to-bottom level hardware description in VLSI design-automation systems

C. Y. Roger Chen, 1988, Proceedings. 1988 International Conference on Computer Languages.

Methodologies for Designing Video Servers

C. Y. Roger Chen, Dikran S. Meliksetian, Frank Feng-Kuo Yu, 2000, IEEE Trans. Multim..

Modeling and reduction of complex timing constraints in high performance digital circuits

C. Y. Roger Chen, Veerapaneni Nagbhushan, 2008, 2008 IEEE International Conference on Computer Design.

Sequencer-Based Data Path Synthesis of Regular Iterative Algorithms

C. Y. Roger Chen, Mohammed Aloqeely, 1994, 31st Design Automation Conference.

Performance Evaluation of Circuit Switched Multistage Interconnection Networks Using a Hold Strategy

C. Y. Roger Chen, Shuo-Hsien Hsiao, 1992, IEEE Trans. Parallel Distributed Syst..

Optimal Routing Algorithm and the Diameter of the Cube-Connected Cycles

C. Y. Roger Chen, Dikran S. Meliksetian, C. Y. R. Chen, 1993, IEEE Trans. Parallel Distributed Syst..

Performance evaluation of HIPPI interconnection system using a camp-on strategy

C. Y. Roger Chen, Abdulaziz S. Mazyad, 1994, Proceedings of 19th Conference on Local Computer Networks.

Issues in networking and data management of distributed multimedia systems

Arif Ghafoor, P. Bruce Berra, C. Y. Roger Chen, 1992, Proceedings of the First International Symposium on High-Performance Distributed Computing. (HPDC-1).

Data path scheduling for two-level pipelining

C. Y. Roger Chen, Michael Z. Moricz, 1991, 28th ACM/IEEE Design Automation Conference.

A new layout optimization methodology for CMOS complex gates

C. Y. Roger Chen, Cliff Yungchin Hou, 1988, [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers.

A transistor reordering technique for gate matrix layout

C. Y. Roger Chen, Uminder Singh, 1991, DAC '90.

A transistor reordering algorithm for the performance optimization of CMOS digital circuits

C. Y. Roger Chen, Bradley S. Carlson, C. Y. Chen, 1992 .

Performance analysis of single-buffered multistage interconnection networks

C. Y. Roger Chen, Shuo-Hsien Hsiao, 1991, Proceedings of the Third IEEE Symposium on Parallel and Distributed Processing.

Message reduction rules (MR2): a methodology to streamline intelligent, message-based, distributed multimedia applications

Kubilay Cardakli, C. Y. Roger Chen, Dikran S. Meliksetian, 1997, Electronic Imaging.

A novel technique for sea of gates global routing

C. Y. Roger Chen, Naresh Sehgal, Bharat Krishna, 2000, ACM Great Lakes Symposium on VLSI.

Partitionable multistage interconnection networks. Part 1: Dynamic subcube compaction

C. Y. Roger Chen, Dikran S. Meliksetian, Muhammad Naeem Ayyaz, 1998, Telecommun. Syst..

A distributed multimedia database system

Arif Ghafoor, P. Bruce Berra, C. Y. Roger Chen, 1988, [1988] Proceedings. Workshop on the Future Trends of Distributed Computing Systems in the 1990s.

Efficient Boolean matching algorithm for cell libraries

C. Y. Roger Chen, Qinghong Wu, John M. Acken, 1994, Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computers and Processors.

Performance analysis of single-buffered multistage interconnection networks

C. Y. Roger Chen, Shuo-Hsien Hsiao, 1994, IEEE Trans. Commun..

Timing driven placement using physical net constraints

C. Y. Roger Chen, Naresh Sehgal, Bill Halpin, 2001, Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232).

Lookup Table Based Discrete Gate Sizing for Delay Minimization with Modified Elmore Delay Model

C. Y. Roger Chen, Jiani Xie, 2015, ACM Great Lakes Symposium on VLSI.

Performance Enhancement of CMOS VLSI Circuits by Transistor Reordering

C. Y. Roger Chen, Bradley S. Carlson, 1993, 30th ACM/IEEE Design Automation Conference.

Optimal algorithms for bubble sort based non-Manhattan channel routing

C. Y. Roger Chen, Cliff Yungchin Hou, Uminder Singh, 1994, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Modelling and storage allocation strategies for homogeneous parallel access storage devices in real time multimedia information processing

P. Bruce Berra, C. Y. Roger Chen, Kingsley C. Nwosu, 1993, Proceedings of ICCI'93: 5th International Conference on Computing and Information.

A delay distribution methodology for the optimal systolic synthesis of linear recurrence algorithms

C. Y. Roger Chen, C. Y. Chen, Michael Z. Moricz, 1991, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

A new algorithm for CMOS gate matrix layout

C. Y. Roger Chen, Cliff Yungchin Hou, 1988, [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers.

Transistor chaining in CMOS leaf cells of planar topology

C. Y. Roger Chen, Bradley S. Carlson, Dikran S. Meliksetian, 1996, Proceedings of the Sixth Great Lakes Symposium on VLSI.

A technique for selecting CMOS transistor orders

C. Y. Roger Chen, Wei-Yu Chen, Ting Wei Chiang, 2007, 2007 25th International Conference on Computer Design.

Algorithms to simplify multi-clock/edge timing constraints

C. Y. Roger Chen, Veerapaneni Nagbhushan, 2007, 2007 25th International Conference on Computer Design.

Partitionable multistage interconnection networks. Part 2: Task migration schemes

C. Y. Roger Chen, Dikran S. Meliksetian, Muhammad Naeem Ayyaz, 2000, Telecommun. Syst..

An Analytical Model for ATM Based Networks Which Utilize Look-Ahead Contention Resolution Switching

C. Y. Roger Chen, James V. Luciani, C. Y. Chen, 1993 .

Resource management issues of a video server

C. Y. Roger Chen, Dikran S. Meliksetian, Frank Fang-Kuo Yu, 1996, Other Conferences.

ew Model for the Performance ation of Synchronous Circuit Switch ltistage Interconnection Networks

C. Y. Roger Chen, Abdulaziz S. Almazyad, Shuo-Hsien Hsiao, 1995 .

Efficient application-independent visualization engine for information with complex data structure

C. Y. Roger Chen, Dikran S. Meliksetian, Frank Wei-Chih Tseng, 1997, Electronic Imaging.

Permutation Capability of Multistage Interconnection Networks

C. Y. Roger Chen, Calvin J. A. Hsia, 1990, ICPP.

A sensitivity based placer for standard cells

C. Y. Roger Chen, Naresh Sehgal, Bill Halpin, 2000, ACM Great Lakes Symposium on VLSI.

Transistor and pin reordering for leakage reduction in CMOS circuits

C. Y. Roger Chen, C. Y. Chen, Jae Woong Chun, 2016, Microelectron. J..

A gridless multi-layer area router

C. Y. Roger Chen, John M. Acken, Naresh Sehgal, 1994, Proceedings of 4th Great Lakes Symposium on VLSI.

Multimedia object modeling and storage allocation strategies

P. Bruce Berra, C. Y. Roger Chen, Kingsley C. Nwosu, 1994, Journal of Intelligent Information Systems.

Dual Eulerian Properties of Plane Multigraphs

C. Y. Roger Chen, Bradley S. Carlson, Dikran S. Meliksetian, 1995, SIAM J. Discret. Math..

A Markov-modulated Bernoulli process approximation for the analysis of Banyan Networks

C. Y. Roger Chen, Dikran S. Meliksetian, C. Y. R. Chen, 1993, SIGMETRICS '93.

Post-processor for data path synthesis using multiport memories

Imtiaz Ahmad, C. Y. Roger Chen, C. Y. Chen, 1991, 1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers.

From logic to symbolic layout for gate matrix

C. Y. Roger Chen, Uminder Singh, 1992, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Multimedia object modelling and storage allocation strategies for heterogeneous parallel access storage devices in real time multimedia computing systems

P. Bruce Berra, C. Y. Roger Chen, Kingsley C. Nwosu, 1993, Proceedings of 1993 IEEE 17th International Computer Software and Applications Conference COMPSAC '93.

A preprocessor for improving channel routing hierarchical pin permutation

C. Y. Roger Chen, Bradley S. Carlson, Cliff Yungchin Hou, 1995, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

The Signal Flow Model: A novel Data Driven Approach to Parallel Processing

C. Y. Roger Chen, Muhammad F. Mudawwar, 1992, ICPP.

An efficient gate delay model for VLSI design

C. Y. Roger Chen, Wei-Yu Chen, Ting Wei Chiang, 2007, 2007 25th International Conference on Computer Design.

g Analysis of the Performance of DQDB

C. Y. Roger Chen, Dikran S. Meliksetian, 1995 .

Collaboration systems for classroom instruction

C. Y. Roger Chen, Dikran S. Meliksetian, Martin Cheng-Shen Chang, 1996, Other Conferences.

An analytical model for partially blocking finite-buffered switching networks

C. Y. Roger Chen, James V. Luciani, 1994, TNET.

A novel ultra-fast heuristic for VLSI CAD steiner trees

C. Y. Roger Chen, Naresh Sehgal, Bharat Krishna, 2003, GLSVLSI '03.

Smoothing algorithms for the delivery of compressed video

C. Y. Roger Chen, Dikran S. Meliksetian, Tacettin Kiprulu, 1997, Proceedings of ICC'97 - International Conference on Communications.

Special Issue on Multimedia Processing and Technology

Arif Ghafoor, C. Y. Roger Chen, A. Ghafoor, 1995, J. Parallel Distributed Comput..

A new technique for exploiting regularity in data path synthesis

C. Y. Roger Chen, Mohammed Aloqeely, 1994, EURO-DAC '94.

Synthesis of asynchronous circuits-testing unique circuit behavior of signal transition graphs

C. Y. Roger Chen, Calvin J. A. Hsia, 1995, Proceedings of ISCAS'95 - International Symposium on Circuits and Systems.