S. Yoshioka

A radiation-hardened 32-bit microprocessor based on the commercial CMOS process

H. Kamimura, S. Kuboyama, T. Tamura, 1994 .

Development of MOS Transistors for Radiation-Hardened Large Scale Integrated Circuits and Analysis of Radiation-Induced Degradation

Shinichi Yoshioka, Hiroshi Kamimura, Mitsuhiro Nakamura, 1994 .

A 0.9 V 150 MHz 10 mW 4 mm/sup 2/ 2-D discrete cosine transform core processor with variable-threshold-voltage scheme

T. Fujita, T. Sakurai, S. Mita, 1996, 1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC.

Variable Threshold-Voltage (VT) Scheme

Tadahiro Kuroda, Kojiro Suzuki, Shinichi Yoshioka, 1996 .

A 5 Gb/s 8/spl times/8 ATM switch element CMOS LSI supporting five quality-of-service classes with 200 MHz LVDS interface

K. Seki-Fukuda, Y. Unekawa, T. Sakurai, 1996, 1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC.

SH3: high code density, low power

Ikuya Kawasaki, Shinichi Yoshioka, Prasenjit Biswas, 1995, IEEE Micro.

An automatic-power-save cache memory for low-power RISC processors

Shinichi Yoshioka, Koichiro Ishibashi, Yasuhisa Shimazaki, 1995, 1995 IEEE Symposium on Low Power Electronics. Digest of Technical Papers.