David E. Wallace

ATV: an abstract timing verifier

Carlo H. Séquin, David E. Wallace, 1988, 25th ACM/IEEE, Design Automation Conference.Proceedings 1988..

A Comparison of Tile-Based Wire Representations for Interactive IC

David E. Wallace, 1984 .

Plug-In Timing Models for an Abstract Timing Verifier

Carlo H. Séquin, David E. Wallace, 1986, 23rd ACM/IEEE Design Automation Conference.

High-level delay estimation for technology-independent logic equations

David E. Wallace, Mandalagiri S. Chandrasekhar, 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

Abstract timing verification for synchronous digital systems

Carlo H. Séquin, David E. Wallace, C. Séquin, 1988 .

Effective Coupling between Logic Synthesis and Layout Tools for Synthesis of Area and Speed-Efficient Circuits

David E. Wallace, Mandalagiri S. Chandrasekhar, Robert H. McCharles, 1997 .

User''s Guide to ATV, an Abstract Timing Verifier

David E. Wallace, 1988 .

Plug-In Timing Models for an Abstract Timing Verifier

Carlo H. Séquin, David E. Wallace, 1986, DAC 1986.