Sung-Gun Cho

Error patterns in belief propagation decoding of polar codes and their mitigation methods

Zhengya Zhang, Shuanghong Sun, Sung-Gun Cho, 2016, 2016 50th Asilomar Conference on Signals, Systems and Computers.

A 2.56mm2 718GOPS configurable spiking convolutional sparse coding processor in 40nm CMOS

Chester Liu, Zhengya Zhang, Sung-Gun Cho, 2017, 2017 IEEE Asian Solid-State Circuits Conference (A-SSCC).

A 3.25Gb/s, 13.2pJ/b, 0.64mm2 Configurable Successive-Cancellation List Polar Decoder using Split-Tree Architecture in 40nm CMOS

Zhengya Zhang, Sung-Gun Cho, Yaoyu Tao, 2019, 2019 Symposium on VLSI Circuits.

A 2048-Neuron Spiking Neural Network Accelerator With Neuro-Inspired Pruning And Asynchronous Network On Chip In 40nm CMOS

Edith Beigné, Zhengya Zhang, Sung-Gun Cho, 2019, 2019 IEEE Custom Integrated Circuits Conference (CICC).

A 2.56-mm2 718GOPS Configurable Spiking Convolutional Sparse Coding Accelerator in 40-nm CMOS

Chester Liu, Zhengya Zhang, Sung-Gun Cho, 2018, IEEE Journal of Solid-State Circuits.

A Configurable Successive-Cancellation List Polar Decoder Using Split-Tree Architecture

Zhengya Zhang, Sung-Gun Cho, Yaoyu Tao, 2020 .

Post-Processing Methods for Improving Coding Gain in Belief Propagation Decoding of Polar Codes

Zhengya Zhang, Shuanghong Sun, Sung-Gun Cho, 2017, GLOBECOM 2017 - 2017 IEEE Global Communications Conference.

PETRA: A 22nm 6.97TFLOPS/W AIB-Enabled Configurable Matrix and Convolution Accelerator Integrated with an Intel Stratix 10 FPGA

Zhengya Zhang, Sung-Gun Cho, Chester Liu, 2021, 2021 Symposium on VLSI Circuits.