M. Woo

A 100 nm copper/low-k bulk CMOS technology with multi Vt and multi gate oxide integrated transistors for low standby power, high performance and RF/analog system on chip applications

P. Abramowitz, J. Conner, M. Woo, 2002, 2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303).

Low cost 65nm CMOS platform for Low Power & General Purpose applications

M. Woo, N. Planes, R. Palla, 2004, Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004..

65nm LP/GP mix low cost platform for multi-media wireless and consumer applications

P. Abramowitz, M. Woo, N. Planes, 2005, Proceedings of 35th European Solid-State Device Research Conference, 2005. ESSDERC 2005..