Eduardo A. C. da Costa

发表

Efficient Dedicated Multiplication Blocks for 2's Complement Radix-2m Array Multipliers

José C. Monteiro, Sergio Bampi, Leandro Zafalon Pieper, 2010, J. Comput..

Maximal sharing of partial terms in MCM under minimal signed digit representation

Paulo F. Flores, José C. Monteiro, Eduardo A. C. da Costa, 2005, Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005..

SATD hardware architecture based on 8×8 Hadamard Transform for HEVC encoder

Eduardo A. C. da Costa, Bianca Silveira, Cláudio Machado Diniz, 2015, 2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS).

HEVC Interpolation Filter Architecture Using Hybrid Encoding Arithmetic Operators

Sergio Bampi, Eduardo A. C. da Costa, Guilherme Paim, 2019, 2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS).

Performance enhancement of H.264/AVC intra frame prediction hardware using efficient 4-2 and 5-2 adder-compressors

Sergio Bampi, Eduardo A. C. da Costa, Cláudio Machado Diniz, 2010, SBCCI '10.

Optimizing the Montgomery Modular Multiplier for a Power- and Area-Efficient Hardware Architecture

Sergio Bampi, Eduardo A. C. da Costa, Guilherme Paim, 2020, 2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS).

Implementation of power efficient multicore FFT datapaths by reordering the twiddle factors

Eduardo A. C. da Costa, Sidinei Ghissoni, Angelo Goncalves da Luz, 2014, 2014 22nd International Conference on Very Large Scale Integration (VLSI-SoC).

A new architecture for signed radix-2/sup m/ pure array multipliers

José C. Monteiro, Sergio Bampi, Eduardo A. C. da Costa, 2002, Proceedings. IEEE International Conference on Computer Design: VLSI in Computers and Processors.

Floating-point adaptive filter architectures for the cancelling of harmonics power line interference

Eduardo A. C. da Costa, Sérgio J. M. de Almeida, Mateus Fonseca, 2015, 2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS).

The Radix-2m Squared Multiplier

Sergio Bampi, Eduardo A. C. da Costa, Guilherme Paim, 2020, 2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

A High Performance Parallel FIR Filters Generation Tool

Sergio Bampi, Eduardo A. C. da Costa, Vagner Santos Da Rosa, 2006, Seventeenth IEEE International Workshop on Rapid System Prototyping (RSP'06).

Optimizing Iterative-based Dividers for an Efficient Natural Logarithm Operator Design

Sergio Bampi, Eduardo A. C. da Costa, Guilherme Paim, 2020, 2020 IEEE 11th Latin American Symposium on Circuits & Systems (LASCAS).

Improved goldschmidt algorithm for fast and energy-efficient fixed-point divider

Sergio Bampi, Eduardo A. C. da Costa, Sérgio J. M. de Almeida, 2017, 2017 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

IIR Filter Architectures with Truncation Error Feedback for ECG Signal Processing

Mateus Beck Fonseca, Eduardo A. C. da Costa, Sérgio J. M. de Almeida, 2019, Circuits Syst. Signal Process..

An improved synthesis method for low power hardwired FIR filters

José C. Monteiro, Sergio Bampi, Eduardo A. C. da Costa, 2004, Proceedings. SBCCI 2004. 17th Symposium on Integrated Circuits and Systems Design (IEEE Cat. No.04TH8784).

Exploring the use of parallel prefix adder topologies into approximate adder circuits

Eduardo A. C. da Costa, Bianca Silveira, Cláudio Machado Diniz, 2017, 2017 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Design of optimized radix-2 and radix-4 butterflies from FFT with decimation in time

Eduardo A. C. da Costa, Mateus Fonseca, Renato Neuenfeld, 2016, 2016 IEEE 7th Latin American Symposium on Circuits & Systems (LASCAS).

Optimization of Single-Stage FFT Architectures Using Multiple Constant Multiplication

Alessandro Girardi, Eduardo A. C. da Costa, Sidinei Ghissoni, 2018, 2018 31st Symposium on Integrated Circuits and Systems Design (SBCCI).

Exploring Motion Vector Cost with Partial Distortion Elimination in Sum of Absolute Differences for HEVC Integer Motion Estimation

Sergio Bampi, Mateus Grellert, Eduardo A. C. da Costa, 2019, 2019 17th IEEE International New Circuits and Systems Conference (NEWCAS).

Design of a Radix-2m Hybrid Array Multiplier Using Carry Save Adder

José C. Monteiro, Sergio Bampi, Eduardo A. C. da Costa, 2005, 2005 18th Symposium on Integrated Circuits and Systems Design.

A VHDL Generation Tool for Optimized Parallel FIR Filters

Sergio Bampi, Eduardo A. C. da Costa, Vagner Santos Da Rosa, 2006, 2006 IFIP International Conference on Very Large Scale Integration.

Exploiting architectural solutions for IIR filter architecture with truncation error feedback

Eduardo A. C. da Costa, Sérgio J. M. de Almeida, Mateus Fonseca, 2016, 2016 IEEE 7th Latin American Symposium on Circuits & Systems (LASCAS).

Power-efficient sum of absolute differences architecture using adder compressors

Eduardo A. C. da Costa, Guilherme Paim, Bianca Silveira, 2016, 2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Ordering and partitioning of coefficients based on heuristic algorithms for low power FIR filter realization

Eduardo A. C. da Costa, Marilton S. de Aguiar, Angelo Goncalves da Luz, 2010, SBCCI '10.

Multiplierless Design of Linear DSP Transforms

Levent Aksoy, Paulo F. Flores, José C. Monteiro, 2011, VLSI-SoC.

Using efficient adder compressors with a split-radix butterfly hardware architecture for low-power IoT smart sensors

Sergio Bampi, Mateus Beck Fonseca, Eduardo A. C. da Costa, 2017, 2017 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Exploiting Partial Distortion Elimination in the Sum of Absolute Differences for Energy-Efficient HEVC Integer Motion Estimation

Sergio Bampi, Mateus Grellert, Eduardo A. C. da Costa, 2018, 2018 31st Symposium on Integrated Circuits and Systems Design (SBCCI).

Exploring power-performance-quality tradeoff of approximate adders for energy efficient sobel filtering

Sergio Bampi, Eduardo A. C. da Costa, Cláudio Machado Diniz, 2018, 2018 IEEE 9th Latin American Symposium on Circuits & Systems (LASCAS).

A Comparison of Layout Implementations of Pipelined and Non-Pipelined Signed Radix-4 Array Multiplier and Modified Booth Multiplier Architectures

Leonardo Londero de Oliveira, José C. Monteiro, Sergio Bampi, 2005, VLSI-SoC.

Energy-efficient Gaussian filter for image processing using approximate adder circuits

Sergio Bampi, Eduardo A. C. da Costa, Leonardo Bandeira Soares, 2015, 2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS).

Exploiting adder compressors for power-efficient 2-D approximate DCT realization

Eduardo A. C. da Costa, Sérgio J. M. de Almeida, Guilherme Paim, 2016, 2016 IEEE 7th Latin American Symposium on Circuits & Systems (LASCAS).

Exploring the use of heuristic-based algorithms for the ordering and partitioning of coefficients for power efficient fir filters realization

Eduardo A. C. da Costa, Marilton S. de Aguiar, Angelo Goncalves da Luz, 2011, SBCCI '11.

Design of an efficient FPGA-based interference canceller structure using NLMS adaptive algorithm

Eduardo A. C. da Costa, Sérgio J. M. de Almeida, E. Costa, 2013, 2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS).

Enhancing a HEVC interpolation filter hardware architecture with efficient adder compressors

Sergio Bampi, Mateus Beck Fonseca, Eduardo A. C. da Costa, 2015, 2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS).

A new pipelined array architecture for signed multiplication

José C. Monteiro, Sergio Bampi, Eduardo A. C. da Costa, 2003, 16th Symposium on Integrated Circuits and Systems Design, 2003. SBCCI 2003. Proceedings..

Power efficient 2-D rounded cosine transform with adder compressors for image compression

Eduardo A. C. da Costa, Sérgio J. M. de Almeida, Guilherme Paim, 2015, 2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS).

High performance Haar Wavelet transform architecture

Eduardo A. C. da Costa, Sérgio J. M. de Almeida, João S. Altermann, 2011, 2011 20th European Conference on Circuit Theory and Design (ECCTD).

A Fixed-Point Natural Logarithm Approximation Hardware Design Using Taylor Series

Sergio Bampi, Eduardo A. C. da Costa, Guilherme Paim, 2018, 2018 New Generation of CAS (NGCAS).

Exploiting general coefficient representation for the optimal sharing of partial products in MCMs

Paulo F. Flores, José C. Monteiro, Eduardo A. C. da Costa, 2006, SBCCI '06.

Exploiting addition schemes for the improvement of optimized radix-2 and radix-4 fft butterflies

Mateus Beck Fonseca, Eduardo A. C. da Costa, Renato H. Neuenfeld, 2017, 2017 IEEE 8th Latin American Symposium on Circuits & Systems (LASCAS).

Effect of Number Representation on the Achievable Minimum Number of Operations in Multiple Constant Multiplications

Levent Aksoy, Paulo F. Flores, José C. Monteiro, 2007, 2007 IEEE Workshop on Signal Processing Systems.

A new array architecture for signed multiplication using Gray encoded radix-2m operands

José C. Monteiro, Sergio Bampi, Eduardo A. C. da Costa, 2007, Integr..

An Efficient NLMS-based VLSI Architecture for Robust FECG Extraction and FHR Processing

Sergio Bampi, Eduardo A. C. da Costa, Guilherme Paim, 2020, 2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Gray encoded fixed-point LMS adaptive filter architecture for the harmonics power line interference cancelling

Eduardo A. C. da Costa, Sérgio J. M. de Almeida, Monica Matzenauer, 2013, 2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI).

A power-predictive environment for fast and power-aware ASIC-based FIR filter design

Sergio Bampi, Eduardo A. C. da Costa, Guilherme Paim, 2017, 2017 30th Symposium on Integrated Circuits and Systems Design (SBCCI).

Using adder compressors for power-efficient 2-D approximate Discrete Tchebichef Transform

Eduardo A. C. da Costa, Guilherme Paim, 2016, 2016 14th IEEE International New Circuits and Systems Conference (NEWCAS).

An exact algorithm for the maximal sharing of partial terms in multiple constant multiplications

Paulo F. Flores, José C. Monteiro, Eduardo A. C. da Costa, 2005, ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005..

Combination of radix-2m multiplier blocks and adder compressors for the design of efficient 2's complement 64-bit array multipliers

José C. Monteiro, Leandro Zafalon Pieper, Eduardo A. C. da Costa, 2013, 2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI).

Maximizing Side Channel Attack-Resistance and Energy-Efficiency of the STTL Combining Multi-Vt Transistors with Current and Capacitance Balancing

Sergio Bampi, Leomar da Rosa, Felipe S. Marques, 2019, 2019 IEEE International Symposium on Circuits and Systems (ISCAS).

Exploring Efficient Adder Compressors for Power-Efficient Sum of Squared Differences Design

Sergio Bampi, Eduardo A. C. da Costa, Guilherme Paim, 2020, 2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Low power sum of absolute differences architecture using novel hybrid adder

Mateus Beck Fonseca, Eduardo A. C. da Costa, Bianca Silveira, 2017, 2017 IEEE 8th Latin American Symposium on Circuits & Systems (LASCAS).

High performance motion estimation architecture using efficient adder-compressors

Sergio Bampi, Marcelo Schiavon Porto, Eduardo A. C. da Costa, 2009, SBCCI.

Low power SATD architecture employing multiple sizes Hadamard Transforms and adder compressors

Eduardo A. C. da Costa, Guilherme Paim, Bianca Silveira, 2017, 2017 15th IEEE International New Circuits and Systems Conference (NEWCAS).

Physical implementation of an ASIC-oriented SRAM-based viterbi decoder

Sergio Bampi, Eduardo A. C. da Costa, Guilherme Paim, 2017, 2017 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Optimal combination of dedicated multiplication blocks and adder trees schemes for optimized radix-2m array multipliers realization

Eduardo A. C. da Costa, Mateus Fonseca, Anderson Martins, 2015, 2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS).

Exact and Approximate Algorithms for the Optimization of Area and Delay in Multiple Constant Multiplications

Levent Aksoy, Paulo F. Flores, José C. Monteiro, 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Gray Encoded Arithmetic Operators Applied to FFT and FIR Dedicated Datapaths

José C. Monteiro, Sergio Bampi, Eduardo A. C. da Costa, 2003, VLSI-SOC.

Optimization of Area in Digital FIR Filters using Gate-Level Metrics

Levent Aksoy, Paulo F. Flores, José C. Monteiro, 2007, 2007 44th ACM/IEEE Design Automation Conference.

Near-threshold computing for very wide frequency scaling: Approximate adders to rescue performance

Sergio Bampi, Eduardo A. C. da Costa, Leonardo Bandeira Soares, 2015, 2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS).

A power-efficient 4-2 Adder Compressor topology

Sergio Bampi, Eduardo A. C. da Costa, Guilherme Paim, 2017, 2017 15th IEEE International New Circuits and Systems Conference (NEWCAS).

Reducing switching activity in FIR filters by reordering the coefficients through the use of improved heuristic algorithm

Eduardo A. C. da Costa, Sidinei Ghissoni, Angelo Goncalves da Luz, 2013, 2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS).

Optimization of area under a delay constraint in digital filter synthesis using SAT-based integer linear programming

Levent Aksoy, Paulo F. Flores, José C. Monteiro, 2006, 2006 43rd ACM/IEEE Design Automation Conference.

Exploring NLMS and IPNLMS Adaptive Filtering VLSI Hardware Architectures for Robust EEG Signal Artifacts Elimination

Sergio Bampi, Eduardo A. C. da Costa, Sérgio J. M. de Almeida, 2020, 2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Fast forward and inverse transforms for the H.264/AVC standard using hierarchical adder compressors

Sergio Bampi, Eduardo A. C. da Costa, João S. Altermann, 2010, 2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip.

Boosting the Efficiency of the Harmonics Elimination VLSI Architecture by Arithmetic Approximations

Sergio Bampi, Eduardo A. C. da Costa, Guilherme Paim, 2021, 2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS).

Exploring Approximate Adders for Power-Efficient Harmonics Elimination Hardware Architectures

Sergio Bampi, Eduardo A. C. da Costa, Guilherme Paim, 2021, 2021 IEEE 12th Latin America Symposium on Circuits and System (LASCAS).

A Power-Efficient FFT Hardware Architecture Exploiting Approximate Adders

Sergio Bampi, Eduardo A. C. da Costa, Guilherme Paim, 2021, 2021 IEEE 12th Latin America Symposium on Circuits and System (LASCAS).