Y. Yamada

UX6-100 nm generation CMOS integration technology with Cu/low-k interconnect

H. Nambu, T. Tamura, T. Nakata, 2002, 2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303).

5-GHz band 30 watt power GaAs FETs

S. Yanagawa, Kazutaka Takagi, Y. Yamada, 1990, IEEE International Digest on Microwave Symposium.

GaAs power MESFETs prepared by metalorganic chemical vapour deposition

S. Yanagawa, K. Arai, K. Kamei, 1981 .

A 65 nm-node CMOS technology with highly reliable triple gate oxide suitable for power-considered system-on-a-chip

T. Fukai, T. Tamura, K. Imai, 2003, 2003 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.03CH37407).

Low-temperature metal/ON/HSG-cylinder capacitor process for high density embedded DRAMs

K. Tokunaga, Y. Takaishi, M. Hamada, 1999, 1999 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.99CH36325).

A 100 nm node CMOS technology for practical SOC application requirement

A. Ono, K. Imai, T. Matsuda, 2001, International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224).