Constantinos E. Goutis

发表

A novel coarse-grain reconfigurable data-path for accelerating DSP kernels

Spyros Tragoudas, Dimitrios Soudris, Michalis D. Galanis, 2004, FPGA '04.

On the Design of Two-Level Pipelined Processor Arrays

Vassilis Paliouras, Thanos Stouraitis, Dimitrios Soudris, 1993 .

Area-Throughput Trade-Offs for SHA-1 and SHA-256 Hash Functions' Pipelined Designs

George Athanasiou, Thanos Stouraitis, George Theodoridis, 2016, J. Circuits Syst. Comput..

A method for partitioning applications in hybrid reconfigurable architectures

Dimitrios Soudris, Michalis D. Galanis, George Theodoridis, 2005, Des. Autom. Embed. Syst..

Power, performance and area exploration of block matching algorithms mapped on programmable processors

Antonios Argyriou, Dimitrios Soudris, Minas Dasygenis, 2001, Proceedings 2001 International Conference on Image Processing (Cat. No.01CH37205).

Trade-Off Analysis of a Low-Power Image Coding Algorithm

Thanos Stouraitis, Constantinos E. Goutis, Kostas Masselos, 1998, J. VLSI Signal Process..

Efficient high-performance implementation of JPEG-LS encoder

Constantinos E. Goutis, Athanasios Kakarountas, Markos E. Papadonikolakis, 2008, Journal of Real-Time Image Processing.

Decoupled Processors Architecture for Accelerating Data Intensive Applications using Scratch-Pad Memory Hierarchy

Constantinos E. Goutis, Athanasios Kakarountas, Harris E. Michail, 2010, J. Signal Process. Syst..

Implementation of Given's Rotation processors for DSP real-time applications

Constantinos E. Goutis, Spiridon Nikolaidis, D. E. Metafas, 1993, Microprocess. Microprogramming.

A methodology for speeding up loop kernels by exploiting the software information and the memory architecture

Constantinos E. Goutis, Vasilios I. Kelefouras, Angeliki Kritikakou, 2015, Comput. Lang. Syst. Struct..

Power exploration of multimedia applications realized on embedded cores

Constantinos E. Goutis, Odysseas G. Koufopavlou, Kostas Masselos, 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

Transformation of Nested Loops into Uniform Recurrences and their Mapping to Regular Processor Arrays

Dimitrios Soudris, Constantinos E. Goutis, Efstathios D. Kyriakis-Bitzaros, 1996, J. Circuits Syst. Comput..

Novel Hardware Implementation of the Cipher Message Authentication Code

Michalis D. Galanis, Constantinos E. Goutis, Harris E. Michail, 2008, J. Comput. Networks Commun..

Reducing Power Consumption through Dynamic Frequency Scaling for a Class of Digital Receivers

Dimitrios Soudris, George Theodoridis, Constantinos E. Goutis, 2000, PATMOS.

Speedups from partitioning critical software parts to coarse-grain reconfigurable hardware

Michalis D. Galanis, Constantinos E. Goutis, Grigoris Dimitroulakos, 2005, 2005 IEEE International Conference on Application-Specific Systems, Architecture Processors (ASAP'05).

Ultra high speed SHA-256 hashing cryptographic module for IPSec hardware/software codesign

George Athanasiou, Constantinos E. Goutis, Harris E. Michail, 2010, 2010 International Conference on Security and Cryptography (SECRYPT).

Performance Improvements from Partitioning Applications to FPGA Hardware in Embedded SoCs

Michalis D. Galanis, Constantinos E. Goutis, Grigoris Dimitroulakos, 2006, The Journal of Supercomputing.

A code transformation-based methodology for improving I-cache performance

Dimitrios Soudris, Constantinos E. Goutis, Nikolaos D. Zervas, 2001, ICECS 2001. 8th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.01EX483).

Performance Gains from Partitioning Embedded Applications in Processor-FPGA SoCs

Michalis D. Galanis, Constantinos E. Goutis, Grigoris Dimitroulakos, 2005, PATMOS.

Mapping DSP Applications to a High-Performance Reconfigurable Coarse-Grain Data-Path

Spyros Tragoudas, Dimitrios Soudris, Michalis D. Galanis, 2004, FPL.

High-Speed FPGA Implementation of Secure Hash Algorithm for IPSec and VPN Applications

George Theodoridis, Constantinos E. Goutis, Athanasios Kakarountas, 2006, The Journal of Supercomputing.

A fast and accurate delay dependent method for switching estimation of large combinational circuits

Dimitrios Soudris, George Theodoridis, Constantinos E. Goutis, 2002, J. Syst. Archit..

A Top-Down Design Methodology for Ultrahigh-Performance Hashing Cores

Constantinos E. Goutis, Athanasios Kakarountas, Harris E. Michail, 2009, IEEE Transactions on Dependable and Secure Computing.

A Novel Constant-Time Fault-Secure Binary Counter

George Theodoridis, Constantinos E. Goutis, Athanasios Kakarountas, 2004, PATMOS.

Systematic Application of Data Transfer and Storage Optimizing Code Transformations for Power Consumption and Execution Time Reduction in ACROPOLIS: A Pre-Compiler for Multimedia Applications

Francky Catthoor, Constantinos E. Goutis, Kostas Masselos, 2003, Des. Autom. Embed. Syst..

Improving performance and energy consumption in embedded microprocessor platforms with a flexible custom coprocessor data-path

Michalis D. Galanis, Constantinos E. Goutis, Grigoris Dimitroulakos, 2007, GLSVLSI '07.

Artificial neural networks in medical decision making systems: an application to pulmonary diseases' diagnosis through VHDL synthesis

Constantinos E. Goutis, Evaggelinos P. Mariatos, George-Peter K. Economou, 1995, Proceedings the European Design and Test Conference. ED&TC 1995.

Optimizing SHA-1 Hash Function for High Throughput with a Partial Unrolling Study

Constantinos E. Goutis, Athanasios Kakarountas, Harris E. Michail, 2005, PATMOS.

Prime-factor DCT algorithms

Thanos Stouraitis, Constantinos E. Goutis, Chrissavgi Dre, 1995, IEEE Trans. Signal Process..

A code transformation-based methodology for improving I-cache performance of DSP applications

Dimitrios Soudris, Constantinos E. Goutis, N. Liveris, 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

Designs and comparisons of authentication modules for IPSec in configurable and extensible embedded processor

George Athanasiou, Constantinos E. Goutis, Harris E. Michail, 2010, 2010 17th IEEE International Conference on Electronics, Circuits and Systems.

A partitioning methodology for accelerating applications in hybrid reconfigurable platforms

Dimitrios Soudris, Michalis D. Galanis, George Theodoridis, 2005, Design, Automation and Test in Europe.

A high-throughput and memory efficient 2D discrete wavelet transform hardware architecture for JPEG2000 standard

Michalis D. Galanis, Constantinos E. Goutis, Grigoris Dimitroulakos, 2005, 2005 IEEE International Symposium on Circuits and Systems.

A CAD Tool for the Development of an Extra-Fast Fuzzy Logic Controller Based on FPGAs and Memory Modules

Constantinos E. Goutis, Evaggelinos P. Mariatos, Alexios N. Birbas, 1994, FPL.

A wavelet-tree image coding system with efficient memory utilization

Thanos Stouraitis, Peter Schelkens, Constantinos E. Goutis, 2001, 2001 IEEE International Conference on Acoustics, Speech, and Signal Processing. Proceedings (Cat. No.01CH37221).

A Matrix–Matrix Multiplication methodology for single/multi-core architectures using SIMD

Constantinos E. Goutis, Vasilios I. Kelefouras, Angeliki Kritikakou, 2014, The Journal of Supercomputing.

Alleviating the data memory bandwidth bottleneck in coarse-grained reconfigurable arrays

Michalis D. Galanis, Constantinos E. Goutis, Grigoris Dimitroulakos, 2005, 2005 IEEE International Conference on Application-Specific Systems, Architecture Processors (ASAP'05).

A Methodology for Speeding up MVM for Regular, Toeplitz and Bisymmetric Toeplitz Matrices

Constantinos E. Goutis, Vasilios I. Kelefouras, Angeliki Kritikakou, 2014, J. Signal Process. Syst..

An ANNs-based system for the diagnosis and treatment of diseases

Constantinos E. Goutis, Dimitrios K. Lymberopoulos, George-Peter K. Economou, 2006, Neural Processing Letters.

An Automated C++ Code and Data Partitioning Framework for Data Management of Data-Intensive Applications

Francky Catthoor, Michalis D. Galanis, George Theodoridis, 2004, SCOPES.

Performance Optimization of Embedded Applications in a Hybrid Reconfigurable Platform

Michalis D. Galanis, Constantinos E. Goutis, Grigoris Dimitroulakos, 2007, PATMOS.

Reconstruction algorithms for limited view projection data

Richard M. Leahy, Constantinos E. Goutis, S. Drossos, 1983, ICASSP.

Partitioning DSP applications to different granularity reconfigurable hardware

Michalis D. Galanis, Constantinos E. Goutis, Grigoris Dimitroulakos, 2005, 2005 12th IEEE International Conference on Electronics, Circuits and Systems.

Experiences accumulated working towards medical decision support systems

Constantinos E. Goutis, N. M. Economopoulos, Dimitrios K. Lymberopoulos, 1994, Microprocess. Microprogramming.

A design flow for speeding-up dsp applications in heterogeneous reconfigurable systems

Michalis D. Galanis, Constantinos E. Goutis, Athanasios Kakarountas, 2006, Microelectron. J..

Design flow for optimizing performance in processor systems with on-chip coarse-grain reconfigurable logic

Michalis D. Galanis, Constantinos E. Goutis, Grigoris Dimitroulakos, 2006, Proceedings 20th IEEE International Parallel & Distributed Processing Symposium.

Exploring the speedups of embedded microprocessor systems utilizing a high-performance coprocessor data-path

Michalis D. Galanis, Constantinos E. Goutis, Grigoris Dimitroulakos, 2006, The Journal of Supercomputing.

An optimal technique for constraint-based image restoration and reconstruction

Richard M. Leahy, Constantinos E. Goutis, 1986, IEEE Trans. Acoust. Speech Signal Process..

A high performance data-path to accelerate DSP kernels

Spyros Tragoudas, Dimitrios Soudris, Michalis D. Galanis, 2004, Proceedings of the 2004 11th IEEE International Conference on Electronics, Circuits and Systems, 2004. ICECS 2004..

Low-power architecture with scratch-pad memory for accelerating embedded applications with run-time reuse

Constantinos E. Goutis, Athanasios Kakarountas, Harris E. Michail, 2009, IET Comput. Digit. Tech..

A data locality methodology for matrix–matrix multiplication algorithm

George Athanasiou, Constantinos E. Goutis, Harris E. Michail, 2010, The Journal of Supercomputing.

DESIGNS FOR WIRELESS SENSOR NODES

Constantinos E. Goutis, G. Selimis, Ioanna Tsekoura, 2010 .

Low power architectures for digital signal processing

Thanos Stouraitis, Constantinos E. Goutis, Kostas Masselos, 2000, J. Syst. Archit..

Low-power implementation of discrete wavelet transform

Thanos Stouraitis, Constantinos E. Goutis, Kostas Masselos, 1998, 9th European Signal Processing Conference (EUSIPCO 1998).

DATA-REUSE EXPLORATION FOR LOW-POWER REALIZATION OF MULTIMEDIA APPLICATIONS ON EMBEDDED CORES

Constantinos E. Goutis, Kostas Masselos, N. D. Zervas, 1999 .

Evaluation of design alternatives for the 2-D-discrete wavelet transform

Constantinos E. Goutis, Yiannis Andreopoulos, Nikolaos D. Zervas, 2001, IEEE Trans. Circuits Syst. Video Technol..

Design methodology for systematic derivation of fault-tolerant processor array architectures

Dimitrios Soudris, Constantinos E. Goutis, E. D. Kyriakis-Bitzaros, 1998 .

A Methodology for Calculating the Undetectable Double-Faults in Self-Checking Circuits

Constantinos E. Goutis, Athanasios Kakarountas, Spiridon Nikolaidis, 2003, J. Circuits Syst. Comput..

An automated methodology for memory-conscious mapping of DSP applications on coarse-grain reconfigurable arrays

Michalis D. Galanis, Constantinos E. Goutis, Grigoris Dimitroulakos, 2005, 2005 IEEE International Symposium on Circuits and Systems.

CORDIC based pipeline architecture for all-pass filters7

Constantinos E. Goutis, Spiridon Nikolaidis, D. E. Metafas, 1993, 1993 IEEE International Symposium on Circuits and Systems.

Novel techniques for bus power consumption reduction in realizations of sum-of-product computation

Thanos Stouraitis, Constantinos E. Goutis, Kostas Masselos, 1999, IEEE Trans. Very Large Scale Integr. Syst..

On the computation of the prime factor DST

Thanos Stouraitis, Constantinos E. Goutis, Chrissavgi Dre, 1995, Signal Process..

Partitioning Methodology for Heterogeneous Reconfigurable Functional Units

Michalis D. Galanis, Constantinos E. Goutis, Grigoris Dimitroulakos, 2006, The Journal of Supercomputing.

On the Development of Totally Self-checking Hardware Design for the SHA-1 Hash Function

George Athanasiou, George Theodoridis, Constantinos E. Goutis, 2012, SECRYPT.

Accurate Power Estimation of Logic Structures Based on Timed Boolean Functions

George Theodoridis, Constantinos E. Goutis, Nikolaos D. Zervas, 2000, PATMOS.

Optimising the SHA-512 cryptographic hash function on FPGAs

George Athanasiou, George Theodoridis, Constantinos E. Goutis, 2013, IET Comput. Digit. Tech..

A Novel Data-Path for Accelerating DSP Kernels

Spyros Tragoudas, Dimitrios Soudris, Michalis D. Galanis, 2004, SAMOS.

A Framework for Data Partitioning for C++ Data-Intensive Applications

Francky Catthoor, Michalis D. Galanis, George Theodoridis, 2004, Des. Autom. Embed. Syst..

Cipher Block Based Authentication Module: a Hardware Design Perspective

Constantinos E. Goutis, Athanasios Kakarountas, Harris E. Michail, 2011, J. Circuits Syst. Comput..

Design space exploration of an optimized compiler approach for a generic reconfigurable array architecture

Michalis D. Galanis, Constantinos E. Goutis, Grigoris Dimitroulakos, 2007, The Journal of Supercomputing.

High-performance FPGA implementations of the cryptographic hash function JH

George Athanasiou, George Theodoridis, Constantinos E. Goutis, 2013, IET Comput. Digit. Tech..

A methodology for the behavioral-level event-driven power management of digital receivers

Dimitrios Soudris, Constantinos E. Goutis, Adonios Thanailakis, 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

Energy Minimization Under Area and Performance Constraints for Multimedia Applications Realized on Embedded Cores

Constantinos E. Goutis, Kostas Masselos, Nikolaos D. Zervas, 2002, VLSI Design.

Array processor for LS FIR system identification

Constantinos E. Goutis, Spiridon Nikolaidis, Sergios Theodoridis, 1991 .

Constraint optimization algorithms for digital image reconstruction from projections

Constantinos E. Goutis, 1978 .

High-throughput Hardware Architectures of the JH Round-three SHA-3 Candidate - An FPGA Design and Implementation Approach

George Athanasiou, George Theodoridis, Constantinos E. Goutis, 2012, SECRYPT.

Power Efficient Vector Quantization Design Using Pixel Truncation

Constantinos E. Goutis, Kostas Masselos, Panagiotis Merakos, 2002, PATMOS.

Systematic design of full adder-based architectures for convolution

Vassilis Paliouras, Thanos Stouraitis, Alexander Skavantzos, 1993, 1993 IEEE International Conference on Acoustics, Speech, and Signal Processing.

A low-power and high-throughput implementation of the SHA-1 hash function

Constantinos E. Goutis, Athanasios Kakarountas, Odysseas G. Koufopavlou, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Accelerating applications by mapping critical kernels on coarse-grain reconfigurable hardware in hybrid systems

Michalis D. Galanis, Constantinos E. Goutis, Grigoris Dimitroulakos, 2005, 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'05).

A Fast and Accurate Method of Power Estimation for Logic Level Networks

Georgios Theodoridis, Dimitrios Soudris, Constantinos E. Goutis, 2001, VLSI Design.

A local wavelet transform implementation versus an optimal row-column algorithm for the 2D multilevel decomposition

Thanos Stouraitis, Gauthier Lafruit, Peter Schelkens, 2001, Proceedings 2001 International Conference on Image Processing (Cat. No.01CH37205).

Real time Cepstrum computation based on an Advanced CORDIC processor

Constantinos E. Goutis, Spiridon Nikolaidis, D. E. Metafas, 1993, Microprocess. Microprogramming.

Array processor for block adaptive LS FIR filtering

Constantinos E. Goutis, Spiridon Nikolaidis, S. Theodoridis, 1994, Signal Process..

Near-lossless compression of continuous-tone still images using fuzzy logic notions and the binary arithmetic coder (Q-Coder)

Constantinos E. Goutis, Alexios N. Birbas, Michael K. Birbas, 1994, Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94.

Memory accesses reordering for interconnect power reduction in sum-of-products computations

Thanos Stouraitis, Constantinos E. Goutis, Kostas Masselos, 2002, IEEE Trans. Signal Process..

Memory hierarchy layer assignment for data re-use exploitation in multimedia algorithms realized on predefined processor architectures

Hugo De Man, Constantinos E. Goutis, Kostas Masselos, 2001, ICECS 2001. 8th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.01EX483).

Comparison of the Hardware Implementation of Stream Ciphers

Michalis D. Galanis, Constantinos E. Goutis, Paris Kitsos, 2005, Int. Arab J. Inf. Technol..

Near-Optimal Microprocessor and Accelerators Codesign with Latency and Throughput Constraints

George Athanasiou, Francky Catthoor, Constantinos E. Goutis, 2013, TACO.

A systematic approach to classify design-time global scheduling techniques

Francky Catthoor, Constantinos E. Goutis, Vasilios I. Kelefouras, 2013, CSUR.

A high-performance data path for synthesizing DSP kernels

Spyros Tragoudas, Michalis D. Galanis, George Theodoridis, 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Hardware implementation of the Totally Self-Checking SHA-256 hash core

George Athanasiou, Constantinos E. Goutis, Athanasios Kakarountas, 2015, IEEE EUROCON 2015 - International Conference on Computer as a Tool (EUROCON).

Exploration of cryptographic ASIP designs for wireless sensor nodes

Francky Catthoor, Constantinos E. Goutis, Georgios N. Selimis, 2010, 2010 17th IEEE International Conference on Electronics, Circuits and Systems.

A novel high-speed counter with counting rate independent of the counter's length

George Theodoridis, Constantinos E. Goutis, Athanasios Kakarountas, 2003, 10th IEEE International Conference on Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003.

Image reconstruction on a special purpose array processor

Constantinos E. Goutis, Odysseas G. Koufopavlou, 1992, Image Vis. Comput..

On the development of high-throughput and area-efficient multi-mode cryptographic hash designs in FPGAs

George Athanasiou, George Theodoridis, Constantinos E. Goutis, 2014, Integr..

Mapping Computational Intensive Applications to a New Coarse-Grained Reconfigurable Data-Path

Spyros Tragoudas, Dimitrios Soudris, Michalis D. Galanis, 2004, PATMOS.

Data-Reuse and Parallel Embedded Architectures for Low-Power, Real-Time Multimedia Applications

Antonios Argyriou, Dimitrios Soudris, Minas Dasygenis, 2000, PATMOS.

Combined Application of Data Transfer and Storage Optimizing Transformations and Subword Parallelism Exploitation for Power Consumption and Execution Time Reduction in VLIW Multimedia Processors

Hugo De Man, Francky Catthoor, Constantinos E. Goutis, 2004, J. VLSI Signal Process..

Array Size Computation under Uniform Overlapping and Irregular Accesses

Francky Catthoor, Constantinos E. Goutis, Vasilios I. Kelefouras, 2016, TODE.

Near-optimal and scalable intrasignal in-place optimization for non-overlapping and irregular access schemes

Francky Catthoor, Constantinos E. Goutis, Vasilios I. Kelefouras, 2013, TODE.

A scalable and near-optimal representation of access schemes for memory management

Francky Catthoor, Constantinos E. Goutis, Vasilios I. Kelefouras, 2014, TACO.

Power Efficient Hierarchical Scheduling for DSP Transformations

Constantinos E. Goutis, Kostas Masselos, Panagiotis K. Merakos, 2002, VLSI Design.

Novel high throughput implementation of SHA-256 hash function through pre-computation technique

Constantinos E. Goutis, Athanasios Kakarountas, Harris E. Michail, 2005, 2005 12th IEEE International Conference on Electronics, Circuits and Systems.

Speedups from extending embedded processors with a high-performance coarse-grained reconfigurable data-path

Michalis D. Galanis, Constantinos E. Goutis, 2008, J. Syst. Archit..

Code Transformations for Embedded Multimedia Applications: Impact on Power and Performance

Constantinos E. Goutis, Kostas Masselos, N. D. Zervas, 1998, ISCA 1998.

Compiler assisted architectural exploration for coarse grained reconfigurable arrays

Michalis D. Galanis, Constantinos E. Goutis, Grigoris Dimitroulakos, 2007, GLSVLSI '07.

Quantization effect on VLSI implementations for the 9/7 DWT filters

Constantinos E. Goutis, Yiannis Andreopoulos, Nikolaos D. Zervas, 2001, 2001 IEEE International Conference on Acoustics, Speech, and Signal Processing. Proceedings (Cat. No.01CH37221).

A methodology for speeding up edge and line detection algorithms focusing on memory architecture utilization

Constantinos E. Goutis, Vasilios I. Kelefouras, Angeliki Kritikakou, 2013, The Journal of Supercomputing.

A systematic methodology for designing multilevel systolic architectures

Dimitrios Soudris, Constantinos E. Goutis, P. D. Georgakopoulos, 1993, 1993 IEEE International Symposium on Circuits and Systems.

A fast DCT processor, based on special purpose CORDIC rotators

Constantinos E. Goutis, D. E. Metafas, Evaggelinos P. Mariatos, 1994, Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94.

Confronting violations of the TSCG(T) in low-power design

Dimitrios Soudris, Constantinos E. Goutis, Athanasios Kakarountas, 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

A unified evaluation framework for coarse grained reconfigurable array architectures

Michalis D. Galanis, Constantinos E. Goutis, Grigoris Dimitroulakos, 2007, CF '07.

A processor for time-varying digital audio filters with special transition properties

John Mourjopoulos, Constantinos E. Goutis, Spiridon Nikolaidis, 1992, Fourth Euromicro workshop on Real-Time Systems.

The Impact of Low-Power Techniques on the Design of Portable Safety-Critical Systems

Constantinos E. Goutis, Athanasios Kakarountas, Spiridon Nikolaidis, 2004, PATMOS.

A Systematic Partitioning Method for Designing Fixed-Size Processor Arrays

Constantinos E. Goutis, Efstathios D. Kyriakis-Bitzaros, 1992, J. Circuits Syst. Comput..

Compiler assisted architectural exploration framework for coarse grained reconfigurable arrays

Michalis D. Galanis, Constantinos E. Goutis, Grigoris Dimitroulakos, 2009, The Journal of Supercomputing.

An Efficient Decompostion Technique for Mapping Nested Loops with Constant Dependencies into Regular Processor Arrays

Constantinos E. Goutis, Efstathios D. Kyriakis-Bitzaros, 1992, J. Parallel Distributed Comput..

Spectra using data distribution and covariance modelling

Richard M. Leahy, Constantinos E. Goutis, P. G. Cassidy, 1984, ICASSP.

A methodology for partitioning DSP applications in hybrid reconfigurable systems

Dimitrios Soudris, Michalis D. Galanis, George Theodoridis, 2005, 2005 IEEE International Symposium on Circuits and Systems.

A Probabilistic Power Estimation Method for Combinational Circuits Under Real Gate Delay Model

Georgios Theodoridis, Dimitrios Soudris, Constantinos E. Goutis, 2001, VLSI Design.

Resource aware mapping on coarse grained reconfigurable arrays

Michalis D. Galanis, Constantinos E. Goutis, Grigoris Dimitroulakos, 2009, Microprocess. Microsystems.

A template-based methodology for efficient microprocessor and FPGA accelerator co-design

George Athanasiou, Francky Catthoor, Constantinos E. Goutis, 2012, 2012 International Conference on Embedded Computer Systems (SAMOS).

Computation Reordering: A Novel Transformation for Low Power DSP Synthesis

Thanos Stouraitis, Constantinos E. Goutis, Kostas Masselos, 1999, VLSI Design.

Direct mapping of nested loops on piecewise regular processor arrays

Dimitrios Soudris, Constantinos E. Goutis, Michael K. Birbas, 1991, Algorithms and Parallel VLSI Architectures.

Strategy for power-efficient design of parallel systems

Hugo De Man, Francky Catthoor, Constantinos E. Goutis, 1999, IEEE Trans. Very Large Scale Integr. Syst..

Power efficient data path synthesis of sum-of-products computations

Thanos Stouraitis, Constantinos E. Goutis, Kostas Masselos, 2003, IEEE Trans. Very Large Scale Integr. Syst..

Resource constrained modulo scheduling for coarse-grained reconfigurable arrays

Michalis D. Galanis, Constantinos E. Goutis, Grigoris Dimitroulakos, 2006, 2006 IEEE International Symposium on Circuits and Systems.

A Systematic Flow for Developing Totally Self-Checking Architectures for SHA-1 and SHA-2 Cryptographic Hash Families

George Athanasiou, George Theodoridis, Constantinos E. Goutis, 2013, J. Circuits Syst. Comput..

Design and implementation of totally-self checking SHA-1 and SHA-256 hash functions' architectures

George Athanasiou, George Theodoridis, Constantinos E. Goutis, 2016, Microprocess. Microsystems.

A framework for partitioning computational intensive applications in hybrid reconfigurable platforms

Dimitrios Soudris, Michalis D. Galanis, George Theodoridis, 2005, 19th IEEE International Parallel and Distributed Processing Symposium.

Alternative architectures for the 2-D DCT algorithm

Thanos Stouraitis, Constantinos E. Goutis, Chrissavgi Dre, 1995, Proceedings of ISCAS'95 - International Symposium on Circuits and Systems.

Space-Time Representation of Iterative Algorithms and the Design of Regular Processor Arrays

Constantinos E. Goutis, Odysseas G. Koufopavlou, Efstathios D. Kyriakis-Bitzaros, 1993, 1993 International Conference on Parallel Processing - ICPP'93.

Image coding using vector quantization of wavelet coefficients

Constantinos E. Goutis, Chrissavgi Dre, George Branis, 1994, Microprocess. Microprogramming.

A Methodology for Speeding Up Fast Fourier Transform Focusing on Memory Architecture Utilization

George Athanasiou, Constantinos E. Goutis, Nikolaos S. Alachiotis, 2011, IEEE Transactions on Signal Processing.

Low power synthesis of sum-of-product computation in DSP algorithms

Thanos Stouraitis, Constantinos E. Goutis, Kostas Masselos, 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

A novel algorithm for low-power image and video coding

Thanos Stouraitis, Constantinos E. Goutis, Kostas Masselos, 1998, IEEE Trans. Circuits Syst. Video Technol..

Server side hashing core exceeding 3 Gbps of throughput

Constantinos E. Goutis, Athanasios Kakarountas, Harris E. Michail, 2007, Int. J. Secur. Networks.

Exploring the design space of an optimized compiler approach for mesh-like coarse-grained reconfigurable architectures

Michalis D. Galanis, Constantinos E. Goutis, Grigoris Dimitroulakos, 2006, Proceedings 20th IEEE International Parallel & Distributed Processing Symposium.

Tomographic and spectral analysis using noise statistics

Richard M. Leahy, Constantinos E. Goutis, S. Drossos, 1984, ICASSP.

A high-throughput, memory efficient architecture for computing the tile-based 2D discrete wavelet transform for the JPEG2000

Michalis D. Galanis, Constantinos E. Goutis, Grigoris Dimitroulakos, 2005, Integr..

An efficient probabilistic method for logic circuits using real delay gate model

Thanos Stouraitis, Dimitrios Soudris, George Theodoridis, 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

Comparative Study on Self-Checking Carry-Propagate Adders in Terms of Area, Power and Performance

Constantinos E. Goutis, Athanasios Kakarountas, Kyriakos Papadomanolakis, 2000, PATMOS.

A compiler method for memory-conscious mapping of applications on coarse-grained reconfigurable architectures

Michalis D. Galanis, Constantinos E. Goutis, Grigoris Dimitroulakos, 2005, 19th IEEE International Parallel and Distributed Processing Symposium.

A systematic methodology for mapping DSP algorithms onto multilevel array architectures

Dimitrios Soudris, Constantinos E. Goutis, P. D. Georgakopoulos, 1995 .

A methodology for power efficient partitioning of data-dominated algorithm specifications within performance constraints

Hugo De Man, Francky Catthoor, Constantinos E. Goutis, 1999, Proceedings. 1999 International Symposium on Low Power Electronics and Design (Cat. No.99TH8477).

Speedups in embedded systems with a high-performance coprocessor datapath

Spyros Tragoudas, Michalis D. Galanis, Constantinos E. Goutis, 2007, TODE.

Performance Improvements in Microprocessor Systems Utilizing a Coprocessor Data-Path

Michalis D. Galanis, Constantinos E. Goutis, Grigoris Dimitroulakos, 2006, 2006 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation.

Low power synthesis of sum-of-products computation (poster session)

Thanos Stouraitis, Constantinos E. Goutis, Kostas Masselos, 2000, ISLPED '00.

Mapping DSP applications on processor/coarse-grain reconfigurable array architectures

Michalis D. Galanis, Constantinos E. Goutis, Grigoris Dimitroulakos, 2006, 2006 IEEE International Symposium on Circuits and Systems.

A systematic methodology for the application of data transfer and storage optimizing code transformations for power consumption and execution time reduction in realizations of multimedia algorithms on programmable processors

Hugo De Man, Francky Catthoor, Constantinos E. Goutis, 2002, IEEE Trans. Very Large Scale Integr. Syst..

Accelerating DSP applications on a mixed granularity platform with a new reconfigurable coarse-grain data-path

Spyros Tragoudas, Dimitrios Soudris, Michalis D. Galanis, 2004, 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines.

A Reconfigurable Coarse-grain Data-path for Accelerating Computational Intensive Kernels

Spyros Tragoudas, Michalis D. Galanis, George Theodoridis, 2005, J. Circuits Syst. Comput..

Switching response modeling of the CMOS inverter for sub-micron devices

Constantinos E. Goutis, Odysseas G. Koufopavlou, Spiridon Nikolaidis, 1998, Proceedings Design, Automation and Test in Europe.

Efficient implementation of the keyed-hash message authentication code (HMAC) using the SHA-1 hash function

Constantinos E. Goutis, Athanasios Kakarountas, Harris E. Michail, 2004, Proceedings of the 2004 11th IEEE International Conference on Electronics, Circuits and Systems, 2004. ICECS 2004..

Speedups and Energy Savings of Microprocessor Platforms with a Coarse-Grained Reconfigurable Data-Path

Michalis D. Galanis, Constantinos E. Goutis, Grigoris Dimitroulakos, 2007, 2007 IEEE International Parallel and Distributed Processing Symposium.

A Space-Time Representation Method of Iterative Algorithms for the Design of Processor Arrays

Constantinos E. Goutis, Efstathios D. Kyriakis-Bitzaros, 1999, J. VLSI Signal Process..

Mapping DSP applications on processor systems with coarse-grain reconfigurable hardware

Michalis D. Galanis, Constantinos E. Goutis, Grigoris Dimitroulakos, 2006, Proceedings 20th IEEE International Parallel & Distributed Processing Symposium.

A Specification Refinement Methodology for Power Efficient Partitioning of Data-Dominated Algorithms Within Performance Constraints

Hugo De Man, Francky Catthoor, Constantinos E. Goutis, 2000, J. VLSI Signal Process..

Novel codebook generation algorithms for vector quantization image compression

Thanos Stouraitis, Constantinos E. Goutis, Kostas Masselos, 1998, Proceedings of the 1998 IEEE International Conference on Acoustics, Speech and Signal Processing, ICASSP '98 (Cat. No.98CH36181).

A methodology for speeding up matrix vector multiplication for single/multi-core architectures

Constantinos E. Goutis, Vasilios I. Kelefouras, Angeliki Kritikakou, 2015, The Journal of Supercomputing.

Fault secure binary counter design

Constantinos E. Goutis, Spiridon Nikolaidis, E. Karaolis, 1999, ICECS'99. Proceedings of ICECS '99. 6th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.99EX357).

A Decoupled Architecture of Processors with Scratch-Pad Memory Hierarchy

Constantinos E. Goutis, Athanasios Kakarountas, Harris E. Michail, 2007, 2007 Design, Automation & Test in Europe Conference & Exhibition.

An optimal technique for tomographic image reconstruction from curved ray projections

Tariq S. Durrani, Constantinos E. Goutis, 1982, ICASSP.

Comparison of the hardware architectures and FPGA implementations of stream ciphers

Michalis D. Galanis, Constantinos E. Goutis, Odysseas G. Koufopavlou, 2004, Proceedings of the 2004 11th IEEE International Conference on Electronics, Circuits and Systems, 2004. ICECS 2004..

Implementation of HSSec: a high-speed cryptographic co-processor

Constantinos E. Goutis, Athanasios Kakarountas, Costas Efstathiou, 2007, 2007 IEEE Conference on Emerging Technologies and Factory Automation (EFTA 2007).

The VLSI implementation of a baseband receiver for DECT-based portable applications

Thanos Stouraitis, Dimitrios Soudris, Constantinos E. Goutis, 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

Low power design of a multi-mode transceiver

Dimitrios Soudris, George Theodoridis, Constantinos E. Goutis, 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

Performance improvements using coarse-grain reconfigurable logic in embedded SOCs

Michalis D. Galanis, Constantinos E. Goutis, Grigoris Dimitroulakos, 2005, International Conference on Field Programmable Logic and Applications, 2005..

A New Method for Low Power Design of Two-Level Logic Circuits

Georgios Theodoridis, Dimitrios Soudris, Constantinos E. Goutis, 1999, VLSI Design.

Performance comparison of DWT scheduling alternatives on programmable platforms

Dimitrios Soudris, Constantinos E. Goutis, Nikolaos D. Zervas, 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

Speedups and Energy Reductions From Mapping DSP Applications on an Embedded Reconfigurable System

Michalis D. Galanis, Constantinos E. Goutis, Grigoris Dimitroulakos, 2007, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Automated framework for partitioning DSP applications in hybrid reconfigurable platforms

Dimitrios Soudris, Michalis D. Galanis, George Theodoridis, 2007, Microprocess. Microsystems.

Power aware data type refinement on the HIPERLAN/2

Francky Catthoor, Michalis D. Galanis, George Theodoridis, 2003, 10th IEEE International Conference on Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003.

Switching activity estimation under real-gate delay using timed Boolean functions

Dimitrios Soudris, George Theodoridis, Constantinos E. Goutis, 2000 .