Yong Kyu Lee

Highly scalable and reliable 2-bit/cell SONOS memory transistor beyond 50nm NVM technology using outer sidewall spacer scheme with damascene gate process

Byung-Gook Park, Chang Woo Oh, Sung Hwan Kim, 2005, Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005..

Multi-level vertical channel SONOS nonvolatile memory on SOI

Jong Duk Lee, Sang Hun Lee, Suk Kang Sung, 2002, 2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303).

Multi-level vertical channel SONOS nonvolatile memory on SOI

Byung-Gook Park, Sang Hun Lee, Jong Duk Lee, 2002, VLSIT 2002.

Damascene gate FinFET SONOS memory implemented on bulk silicon wafer

Chang Woo Oh, Sung Hwan Kim, Donggun Park, 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..

Twin-bit silicon-oxide-nitride-oxide-silicon (SONOS) memory by inverted sidewall patterning (TSM-ISP)

Byung-Gook Park, Jong Duk Lee, Sang Hoon Lee, 2003 .

Nanoscale silicon-oxide-nitride-oxide-silicon (SONOS) structure and its applications

Byung-Gook Park, Dong-gun Park, Yong Kyu Lee, 2004, Proceedings. 7th International Conference on Solid-State and Integrated Circuits Technology, 2004..

A nonvolatile pentacene organic memory (PENTOM) with a triple-layer gate insulator on a flexible substrate

Byung-Gook Park, J. Lee, S. Jin, 2003, 61st Device Research Conference. Conference Digest (Cat. No.03TH8663).

Defect Generation in Data-Storage Layer by Strong Ion Bombardment for Multi-level Non-volatile Memory Applications

Yoonyoung Chung, Yong Kyu Lee, Taewon Seo, 2022, Materials Today Nano.

Embedded STT-MRAM in 28-nm FDSOI Logic Process for Industrial MCU/IoT Application

Yongsung Ji, Gitae Jeong, Seungbae Lee, 2018, 2018 IEEE Symposium on VLSI Technology.