Kavita Goswami

SSTL I/O Standard Based Arithmetic Circuits Design on FPGA

Bishwajeet Pandey, Dil muhammed Akbar Hussain, Kavita Goswami, 2016 .

Capacitance Scaling Based Energy Efficient Vedic Divider using Paravartya Yojayet on 28nm FGPA

Tanesh Kumar, Shivani Madhok, Kavita Goswami, 2016 .

LVCMOS Based Thermal Aware Energy Efficient Vedic Multiplier Design on FPGA

Bishwajeet Pandey, Kavita Goswami, 2014, 2014 International Conference on Computational Intelligence and Communication Networks.

Energy efficient vedic multiplier design using LVCMOS and HSTL IO standard

Bishwajeet Pandey, Kavita Goswami, 2014, 2014 9th International Conference on Industrial and Information Systems (ICIIS).

Reduction of I/O power using energy efficient HSTL I/O standard in vedic multiplier on FPGA

Bishwajeet Pandey, Kavita Goswami, 2015, 2015 2nd International Conference on Computing for Sustainable Global Development (INDIACom).

Voltage scaling based low power high performance Vedic multiplier design on FPGA

Bishwajeet Pandey, Kavita Goswami, Kavita Goswami, 2015, 2015 2nd International Conference on Computing for Sustainable Global Development (INDIACom).

SSTL I/O Standard Based Low Power Thermal Aware Vedic Multiplier Design on FPGA

Bishwajeet Pandey, Kavita Goswami, Kavita Goswami, 2016 .

Low Voltage Digitally Controlled Impedance Based Energy Efficient Vedic Multiplier Design on 28nm FPGA

Bishwajeet Pandey, Abhishek Jain, Deepa Singh, 2014, 2014 International Conference on Computational Intelligence and Communication Networks.

Input/output Buffer based Vedic Multiplier Design for Thermal Aware Energy Efficient Digital Signal Processing on 28nm FPGA

Tanesh Kumar, Bishwajeet Pandey, Kartik Kalia, 2016 .