Yoav Almog

PARROT: Power Awareness Through Selective Dynamically Optimized Traces

Avi Mendelson, Roni Rosner, Yoav Almog, 2003, PACS.

Micro-operation cache: a power aware frontend for the variable instruction length ISA

Avi Mendelson, Yoav Almog, Ronny Ronen, 2001, ISLPED '01.

Power awareness through selective dynamically optimized traces

Avi Mendelson, Roni Rosner, Yoav Almog, 2004, Proceedings. 31st Annual International Symposium on Computer Architecture, 2004..

eXtended block cache

Yoav Almog, Stéphan Jourdan, Mattan Erez, 2000, Proceedings Sixth International Symposium on High-Performance Computer Architecture. HPCA-6 (Cat. No.PR00550).

Specialized dynamic optimizations for high-performance energy-efficient microarchitecture

Roni Rosner, Yoav Almog, Naftali Schwartz, 2004, International Symposium on Code Generation and Optimization, 2004. CGO 2004..

Apparatus to vectorize multiple input instructions

Roni Rosner, Yoav Almog, Ronny Ronen, 2005 .

Method and Apparatus for vectorizing input several commands

Roni Rosner, Yoav Almog, Ronny Ronen, 2005 .

Micro-operation cache: a power aware frontend for variable instruction length ISA

Avi Mendelson, Yoav Almog, Ronny Ronen, 2003, IEEE Trans. Very Large Scale Integr. Syst..