An De Keersgieter

Two- and Three-Dimensional Fully-Depleted Extension-Less Devices for Advanced Logic and Memory Applications (Special Issue : Solid State Devices and Materials)

Anabela Veloso, Marc Aoulaiche, An De Keersgieter, 2013 .

Advanced FinFET Devices for Sub-32nm Technology Nodes: Characteristics and Integration Challenges

Rita Rooyackers, Anabela Veloso, Liesbeth Witters, 2009 .

Stress Techniques and Mobility Enhancement in FinFET Architectures

Naoto Horiguchi, Geert Hellings, Anabela Veloso, 2013 .

Scalability of the Si/sub 1-x/Ge/sub x/ source/drain technology for the 45-nm technology node and beyond

R. Rooyackers, Kristin De Meyer, F. Nouri, 2006, IEEE Transactions on Electron Devices.

Multi-Gate Fin Field-Effect Transistors Junctions Optimization by Conventional Ion Implantation for (Sub-)22 nm Technology Nodes Circuit Applications

Naoto Horiguchi, Anabela Veloso, An De Keersgieter, 2011 .

Stress Techniques in Advanced Transistor Architectures: Bulk FinFETs and Implant-Free Quantum Well Transistors

Naoto Horiguchi, Geert Hellings, Jerome Mitard, 2012 .