Roselyne Chotin-Avot

发表

Efficient multilevel interconnect topology for cluster-based mesh FPGA architecture

Zied Marrakchi, Habib Mehrez, Adrien Blanchardon, 2013, 2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig).

Authenticated encryption on FPGAs from the static part to the reconfigurable part

Habib Mehrez, Roselyne Chotin-Avot, Karim M. Abdellatif, 2014, Microprocess. Microsystems.

The Effect of S-box Design on Pipelined AES Using FPGAs

Habib Mehrez, Roselyne Chotin-Avot, Karim M. Abdellatif, 2012 .

A formalism of the specifications for library development

Habib Mehrez, Roselyne Chotin-Avot, Jung Kyu Chae, 2013, 2013 IEEE International SOC Conference.

AES-GCM and AEGIS: Efficient and High Speed Hardware Implementations

Habib Mehrez, Roselyne Chotin-Avot, Karim M. Abdellatif, 2016, Journal of Signal Processing Systems.

Inter-FPGA routing environment for performance exploration of multi-FPGA systems

Habib Mehrez, Umer Farooq, Roselyne Chotin-Avot, 2016, 2016 International Symposium on Rapid System Prototyping (RSP).

Automatic Allocation of Redundant Operators in Arithmetic Data path Optimization

Habib Mehrez, Alix Munier-Kordon, Roselyne Chotin-Avot, 2008 .

A defect-tolerant cluster in a mesh SRAM-based FPGA

Zied Marrakchi, Habib Mehrez, Mounir Benabdenbi, 2013, 2013 International Conference on Field-Programmable Technology (FPT).

AEGIS-Based Efficient Solution for Secure Reconfiguration of FPGAs

Habib Mehrez, Roselyne Chotin-Avot, Karim M. Abdellatif, 2016, CS2@HiPEAC.

Exploring redundant arithmetics in computer-aided design of arithmetic datapaths

Habib Mehrez, Roselyne Chotin-Avot, Sophie Dupuis, 2013, Integr..

Protecting FPGA bitstreams using authenticated encryption

Habib Mehrez, Roselyne Chotin-Avot, Karim M. Abdellatif, 2013, 2013 IEEE 11th International New Circuits and Systems Conference (NEWCAS).

Architectures matérielles pour l'arithmétique stochastique discrète. (Hardware architecture for discrete stochastic arithmetic)

Roselyne Chotin-Avot, 2003 .

Efficient parallel-pipelined GHASH for message authentication

Habib Mehrez, Roselyne Chotin-Avot, Karim M. Abdellatif, 2012, 2012 International Conference on Reconfigurable Computing and FPGAs.

Low cost solutions for secure remote reconfiguration of FPGAs

Habib Mehrez, Roselyne Chotin-Avot, Karim M. Abdellatif, 2014, Int. J. Embed. Syst..

Arithmetic Data Path Optimization Using Borrow-Save Representation

Habib Mehrez, Roselyne Chotin-Avot, Sophie Dupuis, 2008, 2008 IEEE Computer Society Annual Symposium on VLSI.

Novel architectural space exploration environment for multi-FPGA based prototyping systems

Habib Mehrez, Umer Farooq, Roselyne Chotin-Avot, 2018, Microprocess. Microsystems.

Data Path Optimization using Redundant Arithmetic and Pattern Matching

Habib Mehrez, Roselyne Chotin-Avot, Sophie Belloeil, 2007 .

Improve defect tolerance in a cluster of a SRAM-based Mesh of Cluster FPGA using hardware redundancy

Habib Mehrez, Adrien Blanchardon, Emna Amouri, 2014, 2014 24th International Conference on Field Programmable Logic and Applications (FPL).

Hardware Implementation of Discrete Stochastic Arithmetic

Habib Mehrez, Roselyne Chotin-Avot, 2004, Numerical Algorithms.

High Performances ASIC based Elliptic Curve Cryptographic Processor over GF(2 m )

Rached Tourki, Habib Mehrez, Mohsen Machhout, 2011 .

Impact of Cluster Size on Routability, Testability and Robustness of a Cluster in a Mesh FPGA

Zied Marrakchi, Habib Mehrez, Lorena Anghel, 2014, 2014 IEEE Computer Society Annual Symposium on VLSI.

On the computation of the CESTAC function

Jean-Luc Lamotte, Roselyne Chotin-Avot, Jean-Marie Chesneaux, 2003 .

Improved method for parallel AES-GCM cores using FPGAs

Habib Mehrez, Roselyne Chotin-Avot, Karim M. Abdellatif, 2013, 2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig).

High speed authenticated encryption for slow changing key applications using reconfigurable devices

Habib Mehrez, Roselyne Chotin-Avot, Karim M. Abdellatif, 2013, 2013 IFIP Wireless Days (WD).

Towards high performance GHASH for pipelined AES-GCM using FPGAs (abstract only)

Zied Marrakchi, Habib Mehrez, Roselyne Chotin-Avot, 2014, FPGA.

MP-SoC Architecture for an Obstacle Detection Application in Pre-Crash Situation

Alain Greiner, Mounir Benabdenbi, Raphaël Labayrade, 2006, ReCoSoC.

A reference-based specification tool for creating reliable library development specifications

Habib Mehrez, Roselyne Chotin-Avot, Jung Kyu Chae, 2014, 2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS).

Multiple FPGAs based prototyping and debugging with complete design flow

Habib Mehrez, Umer Farooq, Roselyne Chotin-Avot, 2016, 2016 11th International Design & Test Symposium (IDT).

Impact of defect tolerance techniques on the criticality of a SRAM-based mesh of cluster FPGA

Habib Mehrez, Adrien Blanchardon, Emna Amouri, 2014, 2014 International Conference on ReConFigurable Computing and FPGAs (ReConFig14).

Lightweight and compact solutions for secure reconfiguration of FPGAs

Habib Mehrez, Roselyne Chotin-Avot, Karim M. Abdellatif, 2013, 2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig).

Using Timing-Driven Inter-FPGA Routing for Multi-FPGA Prototyping Exploration

Habib Mehrez, Umer Farooq, Zouha Cherif, 2016, 2016 Euromicro Conference on Digital System Design (DSD).

MixLock: Securing Mixed-Signal Circuits via Logic Locking

Ozgur Sinanoglu, Haralampos-G. D. Stratigopoulos, Muhammad Yasin, 2019, 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Stratus: Free design of highly parametrized VLSI modules interoperable with commercial tools

Habib Mehrez, Roselyne Chotin-Avot, Sophie Dupuis, 2011, 2011 12th International Symposium on Quality Electronic Design.

FPGA-Based High Performance AES-GCM Using Efficient Karatsuba Ofman Algorithm

Habib Mehrez, Roselyne Chotin-Avot, Karim M. Abdellatif, 2014, ARC.

Générateur d'Architecture de FPGA

Habib Mehrez, Adrien Blanchardon, Roselyne Chotin-Avot, 2012 .

Efficient state-dependent power model for multi-bit flip-flop banks

Habib Mehrez, Roselyne Chotin-Avot, Jung Kyu Chae, 2013, 2013 IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS).