B. Shameedha Begum

High-radix Modular Exponentiation for hardware implementation of Public-Key Cryptography

Satyanarayana Vollala, Amit D. Joshi, B. Shameedha Begum, 2016, 2016 International Conference on Computing, Analytics and Security Trends (CAST).

Analysis of multi-core cache coherence protocols from energy and performance perspective

Amit D. Joshi, B. Shameedha Begum, N. Ramasubramanian, 2017, 2017 International Conference on Recent Innovations in Signal processing and Embedded Systems (RISE).

Design of an Intelligent Data Cache with Replacement Policy

N. Ramasubramanian, B. Shameedha Begum, 2019, Int. J. Embed. Real Time Commun. Syst..

Evaluation of password encrypted key exchange authentication techniques: design approach perspective: evaluation of PAKE protocol

Satyanarayana Vollala, B. Shameedha Begum, N. Ramasubramanian, 2017, IML.

Hardware design for multiplicative modular inverse based on table look up technique

N. Ramasubramanian, Satyanarayana Vollala, B. Shameedha Begum, 2015, 2015 International Conference on Computing and Network Communications (CoCoNet).

Cache lifetime enhancement technique using hybrid cache-replacement-policy

B. Shameedha Begum, Bhukya Krishna Priya, N. Ramasubramanian, 2019 .

Bit Forwarding 3-Bits Technique for Efficient Modular Exponentiation

Satyanarayana Vollala, Amit D. Joshi, B. Shameedha Begum, 2017, Int. J. Inf. Secur. Priv..

Design of a Reconfigurable Embedded Data Cache

Amit D. Joshi, B. Shameedha Begum, N. Ramasubramanian, 2016, 2016 International Conference on Computing, Analytics and Security Trends (CAST).

Performance Analysis of Cache Coherence Protocols for Multi-core Architectures: A System Attribute Perspective

N. Ramasubramanian, Satyanarayana Vollala, Amit D. Joshi, 2016 .

Dual-Core Implementation of Right-to-Left Modular Exponentiation

N. Ramasubramanian, Satyanarayana Vollala, Amit D. Joshi, 2019 .