Peter Zeitzoff

发表

Manufacturing sensitivity analysis of a 0.18-micron NMOSFET

Al F. Tasch, Darryl Angelo, S. A. Hareland, 1996, Advanced Lithography.

MOSFET AND FRONT-END PROCESS INTEGRATION: SCALING TRENDS, CHALLENGES, AND POTENTIAL SOLUTIONS THROUGH THE END OF THE ROADMAP

Howard R. Huff, James A. Hutchby, Peter Zeitzoff, 2003 .

Scaling of MOSFETs for future technology generations: Circuit and device scaling, front end processing issues, and advanced MOSFET structures

Peter Zeitzoff, 2003 .

Modeling of Statistical Manufacturing Sensitivity and of Process Control and Metrology Requirements for a .18-um N

Peter Zeitzoff, 2001 .

Modeling of manufacturing sensitivity and of statistically based process control requirements for a 0.18 μm NMOS device

Al F. Tasch, Shamsul A. Khan, Peter Zeitzoff, 1998 .

Design of 0.18-micron NMOSFETs for low-power applications

Al F. Tasch, S. A. Hareland, Shamsul A. Khan, 1997, Advanced Lithography.

Probing stress effects in HfO2 gate stacks with time dependent measurements

Byoung Hun Lee, Gennadi Bersuker, Peter Zeitzoff, 2005, Microelectron. Reliab..

MOSFET AND FRONT-END PROCESS INTEGRATION: SCALING TRENDS, CHALLENGES, AND POTENTIAL SOLUTIONS THROUGH THE END OF THE ROADMAP

Howard R. Huff, James A. Hutchby, Peter Zeitzoff, 2002 .

Extraction of parasitic and channel resistance components in FinFETs using TCAD tools

Peter Zeitzoff, Shesh Mani Pandey, Sudarshan Narayanan, 2016 .

Effect of Pre-Existing Defects on Reliability Assessment of High-K Gate Dielectrics

Byoung Hun Lee, Gennadi Bersuker, Peter Zeitzoff, 2004, Microelectron. Reliab..

Integrated Circuit Technologies

Howard R. Huff, James A. Hutchby, Gennadi Bersuker, 2003 .

Optimization ofSource/Drain Extension forRobustSpeed Performance toProcess Variation inUndopedDouble-Gate CMOS

Ji-Woon Yang, Peter Zeitzoff, 2006 .

Circuit, MOSFET, and front end process integration trends and challenges for the 180 nm and below technology generations: an International Technology Roadmap for Semiconductors perspective

Peter Zeitzoff, 2001, 2001 6th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.01EX443).

Interfacial layer dependence of HFSIXOy gate stacks on vT instability and charge trapping using ULTRA-short pulse I-V characterization

Byoung Hun Lee, George A. Brown, G. Bersuker, 2005 .

Experimental study of etched back thermal oxide for optimization of the Si/high-k interface

Howard R. Huff, Byoung Hun Lee, Gennadi Bersuker, 2004 .

Boron diffusion and activation in the presence of other species

Peter Zeitzoff, Swaroop Ganguly, Sanjay K. Banerjee, 2000, International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No.00CH37138).

Dielectrics for future transistors

Howard R. Huff, George A. Brown, G. Bersuker, 2004 .

Effects of Structural Properties of Hf-Based Gate Stack on Transistor Performance

Howard R. Huff, Byoung Hun Lee, Gennadi Bersuker, 2004 .

Charge trapping in MOCVD hafnium-based gate field dielectric stack structures and its impact on device performance

Howard R. Huff, George A. Brown, G. Bersuker, 2003, IEEE International Integrated Reliability Workshop Final Report, 2003.