Tadayuki Matsumura

IT-Cooling Collaborative Control Methods for Battery-Aware IT-Systems Targeting India

Tadayuki Matsumura, Tetsuya Yamada, 2012, ICT-GLOW.

Cache Power Reduction in Presence of Within-Die Delay Variation Using Spare Ways

Tadayuki Matsumura, Tohru Ishihara, Maziar Goudarzi, 2008, 2008 IEEE Computer Society Annual Symposium on VLSI.

Simultaneous optimization of memory configuration and code allocation for low power embedded systems

Hiroto Yasuura, Tadayuki Matsumura, Tohru Ishihara, 2008, GLSVLSI '08.

Battery-Aware IT Control Method for Effective Battery Use During Power Outage

Tadayuki Matsumura, Tetsuya Yamada, 2012, 2012 IEEE International Conference on Green Computing and Communications.

Way-Scaling to Reduce Power of Cache with Delay Variation

Tadayuki Matsumura, Tohru Ishihara, Maziar Goudarzi, 2008, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

AMPLE: An Adaptive Multi-Performance Processor for Low-Energy Embedded Applications

Tadayuki Matsumura, Toshinori Sato, Tohru Ishihara, 2008, 2008 Symposium on Application Specific Processors.

An Optimization Technique for Low-Energy Embedded Memory Systems

Hiroto Yasuura, Tadayuki Matsumura, Tohru Ishihara, 2009, IPSJ Trans. Syst. LSI Des. Methodol..

Performance comparison of 2D and 3D FPGAs using true-3D CAD tool

Tadahiro Ohmi, Naoto Miyamoto, Tadayuki Matsumura, 2011, 2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS).

Taking Advantage of Within-Die Delay-Variation to Reduce Cache Leakage Power Using Additional Cache-Ways

Tadayuki Matsumura, Tohru Ishihara, Maziar Goudarzi, 2007 .

Development of a CAD tool for 3D-FPGAs

Tadahiro Ohmi, Kenichi Osada, Naoto Miyamoto, 2010, 2010 IEEE International 3D Systems Integration Conference (3DIC).