Yong-Ki Cho

A strategy to reduce the output-buffer skew for hierarchical DLL

Daejeong Kim, Yong-Ki Cho, Ju Hyun Ko, 2006 .

Enhanced Coulomb counting method with adaptive SOC reset time for estimating OCV

Byoung-Kuk Lee, Jung-Hoon Ahn, Seung-Hee Ryu, 2014, 2014 IEEE Energy Conversion Congress and Exposition (ECCE).

A 7Gb/s/pin GDDR5 SDRAM with 2.5ns bank-to-bank active time and no bank-group restriction

Jae-Hyung Lee, Young-Hyun Jun, Dong-Min Kim, 2010, 2010 IEEE International Solid-State Circuits Conference - (ISSCC).

A 40nm 2Gb 7Gb/s/pin GDDR5 SDRAM with a programmable DQ ordering crosstalk equalizer and adjustable clock-tracking BW

Young-Hyun Jun, Dae-Hyun Kim, Young-Sik Kim, 2011, 2011 IEEE International Solid-State Circuits Conference.

ANALYSIS OF FAULT-TOLERANT SYSTEM ARCHI- TECTURE FOR RAILWAY SIGNALING SYSTEMS

Hyun-Jeong Jo, Jong-Gyu Hwang, Yong-Ki Cho, 2014 .

A 7 Gb/s/pin 1 Gbit GDDR5 SDRAM With 2.5 ns Bank to Bank Active Time and No Bank Group Restriction

Jae-Hyung Lee, Young-Hyun Jun, Dong-Min Kim, 2011, IEEE Journal of Solid-State Circuits.

A new SOC estimation algorithm without integrated error using DCIR repetitive calculation

Byoung-Kuk Lee, Jung-Hoon Ahn, Seung-Hee Ryu, 2014, 2014 17th International Conference on Electrical Machines and Systems (ICEMS).