Sankaran M. Menon

发表

Gate level representation of ECL circuits for fault modeling

Anura P. Jayasumana, Yashwant K. Malaiya, Sankaran M. Menon, 1991, [1991] Proceedings. First Great Lakes Symposium on VLSI.

Behavior of faulty single BJT BiCMOS logic gates

Anura P. Jayasumana, Yashwant K. Malaiya, Sankaran M. Menon, 1992, Digest of Papers. 1992 IEEE VLSI Test Symposium.

Contactless Stress testing of memory-I / O interfaces

Sankaran M. Menon, Robert R. Roeder, 2013 .

Enhancement of resolution in supply current based testing for large ICs

Anura P. Jayasumana, Yashwant K. Malaiya, Sankaran M. Menon, 1991, Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's.

On Bridging Faults in ECL Circuits

Anura P. Jayasumana, Yashwant K. Malaiya, Sankaran M. Menon, 1992, The Fifth International Conference on VLSI Design.

Testable design for BiCMOS stuck-open fault detection

Yashwant K. Malaiya, Anura P. Jayasumana, Sankaran M. Menon, 1993, Digest of Papers Eleventh Annual 1993 IEEE VLSI Test Symposium.

Input pattern classification for transistor level testing of BiCMOS circuits

Anura P. Jayasumana, Yashwant K. Malaiya, Sankaran M. Menon, 1994, Proceedings of IEEE VLSI Test Symposium.

Bipolar Memory Circuits

Sankaran M. Menon, Phanindra K. Mannava, 1999 .

"SoC and Multi-Core Debug: Are Design for Debug (DFD) features that are put in reuse cores sufficient for Silicon Debug?"

Sankaran M. Menon, 2006 .

Input pattern classification for detection of stuck-ON and bridging faults using I/sub DDQ/ testing in BiCMOS and CMOS circuits

Anura P. Jayasumana, Yashwant K. Malaiya, Sankaran M. Menon, 1997, Proceedings Tenth International Conference on VLSI Design.

Input pattern classification for transistor level testing of bridging faults in BiCMOS circuits

Anura P. Jayasumana, Yashwant K. Malaiya, Sankaran M. Menon, 1996, Proceedings of the Sixth Great Lakes Symposium on VLSI.

Test generation for BiCMOS circuits

Anura P. Jayasumana, Yashwant K. Malaiya, Sankaran M. Menon, 1993, 1993 IEEE International Symposium on Circuits and Systems.

A novel high-speed BiCMOS domino logic family

Anura P. Jayasumana, Yashwant K. Malaiya, Sankaran M. Menon, 1995, Proceedings of ISCAS'95 - International Symposium on Circuits and Systems.

Behavior of faulty double BJT BiCMOS logic gates

Anura P. Jayasumana, Yashwant K. Malaiya, Sankaran M. Menon, 1992 .

The effect of built-in current sensors (BICS) on operational and test performance /spl lsqb/CMOS ICs/spl rsqb/

Anura P. Jayasumana, Yashwant K. Malaiya, Sankaran M. Menon, 1994, Proceedings of 7th International Conference on VLSI Design.