D. V. Poornaiah

Sign extension bit minimisation algorithm for designing VLSI inner-product-processor cells for DSP applications

D. V. Poornaiah, 1998 .

Microprocessor-Controlled Road Traffic Signalling System “Micorts”

Avinash K. Shrivastava, D. V. Poornaiah, K.S.R. Anjaneyulu, 1980 .

A novel VLSI BiCMOS/bipolar concurrent multiplier-accumulator for DSP applications

M. O. Ahmad, D. V. Poornaiah, P. Ananda Mohan, 1993, 1993 Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting.

Design and VLSI implementation of a novel concurrent 16-bit multiplier-accumulator for DSP applications

M. Omair Ahmad, D. V. Poornaiah, R. Haribabu, 1993, 1993 IEEE International Conference on Acoustics, Speech, and Signal Processing.

Circuits and Systems Letters

D. V. Poornaiah, 1987 .

Design of a 3-bit Booth recoded novel VLSI concurrent multiplier-accumulator architecture

P. V. Ananda Mohan, D. V. Poornaiah, 1995, Proceedings of the 8th International Conference on VLSI Design.

A novel VLSI concurrent dual multiplier-dual adder architecture for image and video coding applications

P. V. Ananda Mohan, D. V. Poornaiah, 1996, Proceedings of 9th International Conference on VLSI Design.

Algorithm for designing efficient VLSI concurrent add-multiply and add-multiply-add cells for DSP applications

D. V. Poornaiah, 2000 .

Design and implementation of a programmable bit-rate multipulse excited LPC vocoder for digital cellular radio applications

P.V.A. Mohan, D. V. Poornaiah, S. M. Chadchan, 1994, Proceedings of 1994 International Conference on Personal Wireless Communications.