J. Daga

Inverter delay modelling for submicrometre CMOS process

J. Daga, S. Turgis, D. Auvergne, 1996 .

Signal transition time effect on CMOS delay evaluation

Jean Michel Daga, Daniel Auvergne, Mustapha Rezzoug, 2000 .

A comprehensive delay macro modeling for submicrometer CMOS logics

D. Auvergne, J. M. Daga, J. Daga, 1999, IEEE J. Solid State Circuits.

Temperature effect on delay for low voltage applications [CMOS ICs]

Jean Michel Daga, Daniel Auvergne, E. Ottaviano, 1998, Proceedings Design, Automation and Test in Europe.

Electrical Simulation Model of the 2T-FLOTOX Core-Cell for Defect Injection and Faulty Behavior Prediction in eFlash Memories

Arnaud Virazel, Patrick Girard, Serge Pravossoudovitch, 2007, 12th IEEE European Test Symposium (ETS'07).

Evaluation of Design for Reliability Techniques in Embedded Flash Memories

Benoît Godard, Lionel Torres, Jean Michel Daga, 2007, 2007 Design, Automation & Test in Europe Conference & Exhibition.

A PMOS-switch based charge pump, allowing lost cost implementation on a CMOS standard process

J.-M. Daga, E. Racape, J. Daga, 2005, Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005..

Hierarchical Code Correction and Reliability Management in Embedded nor Flash Memories

Benoît Godard, Lionel Torres, Jean Michel Daga, 2008, 2008 13th European Test Symposium.