Hideaki Numata

发表

Full operation of a switching node circuit for superconducting ring network

Yoshihito Hashimoto, Masashi Koike, Shuichi Tahara, 1999 .

A Resistor Coupled Josephson Polarity-Convertible Driver (Special Section on Superconducting Devices)

Yoshihito Hashimoto, Shuichi Nagasawa, Shuichi Tahara, 1994 .

Josephson high-speed and low-power LSI technology

Yoshihito Hashimoto, Shuichi Nagasawa, Shuichi Tahara, 1995 .

Superconducting digital electronics

Yoshihito Hashimoto, Shuichi Tahara, Mutsuo Hidaka, 2001 .

A Josephson built-in self-testing (JBIST) system for gigahertz functional tests of Josephson RAMs

Yoshihito Hashimoto, Hiroshi Nakagawa, Masahiro Aoyagi, 1996 .

Fabrication Technology for Nb Integrated Circuits

Shuichi Tahara, Hideaki Numata, S. Tahara, 2001 .

Evaluation of Dynamic Performance of CNT Random Network Transistors

Takao Someya, Tomoyuki Yokota, Hideaki Numata, 2013 .

Josephson Memory Technology

Yoshihito Hashimoto, Shuichi Nagasawa, Shuichi Tahara, 1996 .

High-speed testing of Josephson logic circuits by an on-chip signal-pattern generator

Yoshihito Hashimoto, Masashi Koike, S. Tahara, 1999 .

Via-Switch FPGA: 65-nm CMOS Implementation and Evaluation

Toshitsugu Sakamoto, Munehiro Tada, Naoki Banno, 2021, IEEE Journal of Solid-State Circuits.

Bit yield improvement by precise control of stray fields from SAF pinned layers for high-density MRAMs

Hiroaki Yoda, Hiromitsu Hada, S. Tahara, 2005 .

Investigation of SFQ integrated circuits using Nb fabrication technology

Shuichi Tahara, M. Tanaka, Hideaki Numata, 1999 .

Superconducting Technology for Digital Applications Using Niobium Josephson Junctions

Yoshihito Hashimoto, Shuichi Nagasawa, Shinichi Yorozu, 2000 .

380 ps, 9.5 mW Josephson 4 Kbit RAM

Yoshihito Hashimoto, Shuichi Nagasawa, S. Tahara, 1994 .

Fabrication technology for a high-density Josephson LSI using an electron cyclotron resonance etching technique and a bias-sputtering planarization

Shuichi Nagasawa, Shuichi Tahara, Hideaki Numata, 1996 .