Junyan Ren

发表

Low-cost parallel fir digital filter structures utilizing the coefficient symmetry

Fan Ye, Zhenqi Liu, Junyan Ren, 2012, 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology.

A testing system for high speed multi-channel ADC with LVDS data output based on FPGA

Ye Fan, Junyan Ren, Qiang Zhang, 2014, 2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

A sideband-suppressed low-power synthesizer for 14-band dual-carrier MB-OFDM UWB transceivers

Wei Li, Ning Li, Junyan Ren, 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

A 12-bit 50-MSPS SHA-less opamp-sharing Analog-to-Digital converter in 65nm CMOS

Junyan Ren, Fan Ye, Chen Shu, 2011, 2011 9th IEEE International Conference on ASIC.

A digitally calibrated 14-bit linear 100-MS/s pipelined ADC with wideband sampling frontend

Fan Ye, Long Cheng, Junyan Ren, 2009, 2009 Proceedings of ESSCIRC.

A 9.8 Gbps, 6.5 mW forwarded-clock receiver with phase interpolator and equalized current sampler in 65 nm CMOS

Shunli Ma, Hao Yu, Junyan Ren, 2015, 2015 IEEE MTT-S International Microwave Symposium.

A 5.6∼8.2GHz QVCO with a new DCCA circuit

Ning Li, Junyan Ren, Ning Zhu, 2012, 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology.

Design of Low-Power, 1GS/s Throughput FFT Processor for MIMO-OFDM UWB Communication System

Liang Liu, Junyan Ren, Xuejing Wang, 2007, 2007 IEEE International Symposium on Circuits and Systems.

Switch-back based on charge equalization switching technique for SAR ADC

Junyan Ren, Fan Ye, Weiru Gu, 2015, IEICE Electron. Express.

Area efficient LDPC decoder design for parallel layered decoding

Yuan Yao, Junyan Ren, Fan Ye, 2011, 2011 9th IEEE International Conference on ASIC.

A Fast Non-Monte-Carlo Yield Analysis and Optimization by Stochastic Orthogonal Polynomials

Hao Yu, Sheldon X.-D. Tan, Fang Gong, 2012, ACM Trans. Design Autom. Electr. Syst..

A harmonic-suppressed regenerative divide-by-5 frequency divider for UWB applications

Wei Li, Junyan Ren, Haipeng Fu, 2011, 2011 IEEE International Symposium of Circuits and Systems (ISCAS).

A 15MHz BW continuous-time ΔΣ modulator with high speed digital ELD compensation

Junyan Ren, Fan Ye, Hang Hu, 2017, 2017 IEEE 12th International Conference on ASIC (ASICON).

A proved dither-injection method for memory effect in double sampling pipelined ADC

Junyan Ren, Yongzhen Chen, Fan Ye, 2017, 2017 IEEE 12th International Conference on ASIC (ASICON).

A current-mode 6–9GHz UWB transmitter with output power flattening technique

Wei Li, Ning Li, Junyan Ren, 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

Flexible analog baseband for WiMedia MB-OFDM and China UWB standard

Ting Gao, Ning Li, Feng Zhou, 2010, 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology.

A 53-to-73GHz power amplifier with 74.5mW/mm2 output power density by 2D differential power combining in 65nm CMOS

Hao Yu, Junyan Ren, Wei Meng Lim, 2013, 2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC).

A 131.5GHz, −84dBm sensitivity super-regenerative receiver by zero-phase-shifter coupled oscillator network in 65nm CMOS

Shunli Ma, Hao Yu, Yang Shang, 2014, ESSCIRC 2014 - 40th European Solid State Circuits Conference (ESSCIRC).

A hardware implementation solution for DC-OFDM-based UWB PHY

Fan Ye, Junyan Ren, 2010, 2010 IEEE International Conference on Ultra-Wideband.

A low-jitter frequency synthesizer with dynamic phase interpolation for high-speed Ethernet

Ye Fan, Junyan Ren, Lu Ping, 2006, 2006 IEEE International Symposium on Circuits and Systems.

An 11b 80MS/s SAR ADC With Speed-Enhanced SAR Logic and High-Linearity CDAC

Junyan Ren, Yongzhen Chen, Fan Ye, 2018, 2018 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS).

Comments on "Estimation of Carrier Frequency Offset With I/Q Mismatch Using Pseudo-Offset Injection in OFDM Systems"

Xiaolong Wang, Junyan Ren, Fan Ye, 2012, IEEE Trans. Circuits Syst. I Regul. Pap..

A time-to-digital converter based AFC for wideband frequency synthesizer

Wei Li, Ning Li, Jin Zhou, 2012, 2012 IEEE International Symposium on Circuits and Systems.

General expression based inner loop unrolling scheme for TV-GD algorithm adopted in photoacoustic imaging

Jun Xu, Junyan Ren, Yuanyuan Wang, 2014, 2014 IEEE Biomedical Circuits and Systems Conference (BioCAS) Proceedings.

A high power-efficient LVDS output driver with adjustable feed-forward capacitor compensation

Junyan Ren, Fan Ye, Yuan Su, 2015, IEICE Electron. Express.

Memory efficient LDPC decoder design

Fan Ye, Yuan Yao, Junyan Ren, 2011, 2011 Asia Pacific Conference on Postgraduate Research in Microelectronics & Electronics.

A 5.5mW 80-400MHz Gm-C low pass filter with a unique auto-tuning system

Ting Gao, Wei Li, Ning Li, 2011, IEICE Electron. Express.

A K-band injection-locked frequency tripler with injection-enhancement in 130-nm CMOS

Wei Wang, Ning Li, Junyan Ren, 2014, 2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

A 11-bit ENOB Noise-shaping SAR ADC with Non-binary DAC Array

Fan Ye, Junyan Ren, Hang Hu, 2018, 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

FFT design for OFDM-based cognitive radio using a reconfigurable baseband processing architecture

Junyan Ren, Xiaofang Zhou, Gerald E. Sobelman, 2013, 2013 IEEE 10th International Conference on ASIC.

A 14-bit 200-MS/s time-interleaved ADC calibrated with LMS-FIR and interpolation filter

Fan Ye, Junyan Ren, Yu Zhu, 2011, 2011 IEEE International Conference of Electron Devices and Solid-State Circuits.

A novel digital calibration with low complexity for pipelined ADC

Fan Ye, Long Cheng, Junyan Ren, 2009, 2009 IEEE 8th International Conference on ASIC.

High-Efficiency Micromachined Sub-THz Channels for Low-Cost Interconnect for Planar Integrated Circuits

Qun Jane Gu, Junyan Ren, Xiaoguang Liu, 2016, IEEE Transactions on Microwave Theory and Techniques.

Digital baseband design for DC-OFDM based UWB systems

Fan Ye, Jing Lin, Junyan Ren, 2013, 2013 International Conference on Computational Problem-Solving (ICCP).

A 13-bit non-binary weighted SAR ADC with bridge structure using digital calibration for capacitor weight error

Junyan Ren, Fan Ye, Xiaoqing Chen, 2017, 2017 IEEE 12th International Conference on ASIC (ASICON).

A DLL based low-phase-noise clock multiplier with offset-tolerant PFD

Junyan Ren, Fan Ye, Yuwen Wang, 2013, 2013 IEEE 10th International Conference on ASIC.

A 2.4GHz to 3.86GHz digitally controlled oscillator with 18.5kHz frequency resolution using single PMOS varactor

Wei Li, Ning Li, Junyan Ren, 2012, IEICE Electron. Express.

An artificial neural network chip based on two-dimensional semiconductor.

Yan Wang, Yin Wang, Shunli Ma, 2020, Science bulletin.

A 1.2V low-jitter PLL for UWB

Fan Ye, Ning Li, Junyan Ren, 2007, 2007 7th International Conference on ASIC.

A 7.8 fJ/conversion-step 9-bit 400-MS/s single-channel SAR ADC with fast control logic

Junyan Ren, Yongzhen Chen, Fan Ye, 2019, Microelectron. J..

A 600-msample/s, 25-mW, 6-bit folding and interpolating ADC in 0.13µm CMOS

Fan Ye, Junyan Ren, Li Lin, 2009, 2009 IEEE 8th International Conference on ASIC.

A 4-mW8-b 600-MS/s 2-b-per-cycle SAR ADC with a capacitive DAC

Junyan Ren, Fan Ye, Huabin Chen, 2013, 2013 IEEE 10th International Conference on ASIC.

A 5G Wireless Event-Driven Sensor Chip for Online Power-Line Disturbances Detecting Network in 0.25 μm GaAs Process

Shunli Ma, Junyan Ren, Tianxiang Wu, 2021, IEEE Transactions on Industrial Electronics.

A 20mW 200MHz CMOS continuous-time sigma-delta modulator with 5MHz signal bandwidth and 12 bits of resolution

Jun Xu, Junyan Ren, Yiran Li, 2007, 2007 7th International Conference on ASIC.

A 39 GHz–80 GHz millimeter-wave frequency doubler with low power consumption in 65nm CMOS tehnology

Shunli Ma, Junyan Ren, Qian Chen, 2015, 2015 IEEE 11th International Conference on ASIC (ASICON).

A foreground digital calibration by switching control scheme for A 12-bit SAR ADC

Fan Ye, Jun Xu, Junyan Ren, 2014, 2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

A wide-band input buffer for 3GS/s 12bit time-interleaved ADC

Fan Ye, Junyan Ren, Yongzhen Chen, 2016, 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

A 1.5-GS/s 5-bit interpolating ADC with offset averaging and interpolating sharing resistors network

Ning Li, Junyan Ren, Yongzhen Chen, 2015, 2015 IEEE 11th International Conference on ASIC (ASICON).

An implementation of a CMOS down-conversion mixer for GSM1900 receiver

Wei Li, Junyan Ren, Fangqing Chu, 2006, Asia and South Pacific Conference on Design Automation, 2006..

A 0.4–6GHz LO generation system using a dual-mode VCO for Software-Defined Radio

Ning Li, Jin Zhou, Junyan Ren, 2010, 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology.

A 22-mW 2.2%-EVM UWB Transmitter Using On-Chip Transformer and LO Leakage Calibration

Wei Li, Ning Li, Junyan Ren, 2011, IEICE Trans. Electron..

Implementation of Folded Sliding Block Viterbi Decoders for MB-OFDM UWB Communication System

Zhuo Xu, Junyan Ren, Xuejing Wang, 2007, 2007 IEEE International Symposium on Circuits and Systems.

A CMOS 0.5–10.6 GHz inductor feedback low noise amplifier for multi-standard application

Ning Li, Feng Zhou, Junyan Ren, 2010, 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology.

Periodic steady-state analysis of coupled ODE-AE-CGE systems for MOS RF autonomous circuit simulation

Xinyu Wu, Junyan Ren, Jinmei Lai, 2003, ASP-DAC '03.

A 42fJ 8-bit 1.0-GS/s folding and interpolating ADC with 1GHz signal bandwidth

Wei Li, Junyan Ren, Fan Ye, 2014, IEICE Electron. Express.

An 80-MS/s 14-bit pipelined ADC featuring 83 dB SFDR

Junyan Ren, Fan Ye, Long Cheng, 2010 .

Greedy approach based heuristics for partitioning SpMxV on FPGAs

Junyan Ren, Weina Lu, Jiasen Huang, 2015, 2015 25th International Conference on Field Programmable Logic and Applications (FPL).

A current-mode RF transmitter for 6–9 GHz MB-OFDM UWB application

Wei Li, Ning Li, Junyan Ren, 2010, Science China Information Sciences.

A 32.5-GS/s two-channel time-interleaved CMOS sampler with switched-source follower based track-and-hold amplifier

Shunli Ma, Hao Yu, Junyan Ren, 2014, 2014 IEEE MTT-S International Microwave Symposium (IMS2014).

Seven-bit 700-MS/s Four-Way Time-Interleaved SAR ADC With Partial $V_{\mathrm {cm}}$ -Based Switching

Rui Paulo Martins, Fan Ye, Junyan Ren, 2017, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Transformer-based varactor-less 96GHz–110GHz VCO and 89GHz–101GHz QVCO in 65nm CMOS

Junyan Ren, Howard C. Luong, Xiaolong Liu, 2016, 2016 IEEE Asian Solid-State Circuits Conference (A-SSCC).

A time-to-digital converter based AFC for wideband frequency synthesizer

Ning Li, Wei Li, Junyan Ren, 2014 .

A low-jitter and low-power frequency synthesizer applied to 1000 Base-T Ethernet

Yan Wang, Junyan Ren, Ping Lu, 2006 .

A 1.1-Gb/s 115-pJ/bit Configurable MIMO Detector Using 0.13- $\mu\hbox{m}$ CMOS Technology

Tong Zhang, Liang Liu, Junyan Ren, 2010, IEEE Transactions on Circuits and Systems II: Express Briefs.

A 7GHz-bandwidth 31.5 GHz FMCW-PLL with novel twin-VCOs structure in 65nm CMOS

Shunli Ma, Ning Li, Junyan Ren, 2017, 2017 IEEE Asian Solid-State Circuits Conference (A-SSCC).

A 1.2 V 1.0-GS/s 8-bit Voltage-Buffer-Free Folding and interpolating ADC

Fan Ye, Ning Li, Junyan Ren, 2012, 2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS).

A low-Power PGA with DC-Offset Cancellation in 65 nm CMOS process

Shunli Ma, Fan Ye, Junyan Ren, 2016, 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

A 400Mb/s Radix-4 MAP Decoder with Fast Recursion Architecture

Fan Ye, Cheng Zhang, Junyan Ren, 2008, 2008 10th International Conference on Advanced Communication Technology.

A stacked-packaged 16-channel ADC for ultrasound application

Yimin Wu, Junyan Ren, Yongzhen Chen, 2017, 2017 IEEE 12th International Conference on ASIC (ASICON).

A 1.2 V 70 mA low drop-out voltage regulator in 0.13 µm CMOS process

Wei Li, Ning Li, Junyan Ren, 2011, 2011 9th IEEE International Conference on ASIC.

A 0.13-µm CMOS 0.1-12GHz active balun-LNA for multi-standard applications

Wei Li, Ning Li, Junyan Ren, 2013, IEICE Electron. Express.

A −78dBm sensitivity super-regenerative receiver at 96 GHz with quench-controlled metamaterial oscillator in 65nm CMOS

Hao Yu, Junyan Ren, Haipeng Fu, 2013, 2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC).

Nyquist-rate time-interleaved current-steering DAC with dynamic channel matching

Ning Li, Long Cheng, Junyan Ren, 2011, 2011 IEEE International Symposium of Circuits and Systems (ISCAS).

A Time-Interleaved SAR Assisted Pipeline ADC With a Bias-Enhanced Ring Amplifier

Fan Ye, Junyan Ren, Yongzhen Chen, 2018, IEEE Transactions on Circuits and Systems II: Express Briefs.

A 96-GHz Oscillator by High-$Q$ Differential Transmission Line loaded with Complementary Split-Ring Resonator in 65-nm CMOS

Hao Yu, Yang Shang, Junyan Ren, 2013, IEEE Transactions on Circuits and Systems II: Express Briefs.

A 4-channel 8-bit 650-MSample/s DAC with interpolation filter for embedded application

Ning Li, Junyan Ren, Fan Ye, 2011, 2011 9th IEEE International Conference on ASIC.

A Third-order Band-pass Fully-passive Noise-Shaping Modulator Based on a Time-interleaved SAR ADC

Yimin Wu, Junyan Ren, Fan Ye, 2018, 2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS).

A wide-division-ratio 100MHz-to-5GHz multi-modulus divider chain for wide-band PLL

Shunli Ma, Qian Chen, Junyan Ren, 2015, 2015 IEEE 11th International Conference on ASIC (ASICON).

A robust CMOS RF front-end design for 3.1–4.8GHz MB-OFDM UWB system

Ning Li, Junyan Ren, Wei Li, 2008, 2008 9th International Conference on Solid-State and Integrated-Circuit Technology.

A 7.9-GHz transformer-feedback quadrature VCO with a noise-shifting coupling network

Junyan Ren, Howard C. Luong, Chixiao Chen, 2016, 2016 IEEE Asian Solid-State Circuits Conference (A-SSCC).

A 1.0 GS/s 7bit Pipelined-Folding-Interpolating ADC with 6.0 ENOB at nyquist frequency

Fan Ye, Ning Li, Junyan Ren, 2011, 2011 IEEE International Symposium on Radio-Frequency Integration Technology.

A 50MHz–812MHz, 700mW low-power PLL with a constant KVCO ring oscillator

Shunli Ma, Ye Fan, Ning Li, 2014, 2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

A wide-range and high-precision real-time calibration for dynamic comparator

Fan Ye, Jun Xu, Junyan Ren, 2012, 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology.

A 75.7GHz to 102GHz rotary-traveling-wave VCO by tunable composite right /left hand T-line

Shunli Ma, Hao Yu, Junyan Ren, 2013, Proceedings of the IEEE 2013 Custom Integrated Circuits Conference.

100MS/s 9-bit 0.43mW SAR ADC with custom capacitor array

Jun Xu, Junyan Ren, Jingjing Wang, 2015, ASICON.

A low power programmable band-pass filter with novel pseudo-resistor for portable biopotential acquisition system

Shunli Ma, Junyan Ren, Yiwen Zhang, 2012, 2012 IEEE Asia Pacific Conference on Circuits and Systems.

An RF Transmitter front-end implementation in 0.18μm CMOS for OFDM-UWB

Ning Li, Junyan Ren, Wei Li, 2008, 2008 9th International Conference on Solid-State and Integrated-Circuit Technology.

60GHz CMOS Coupled Oscillator Network by Zero-Phase-Shifters

Shunli Ma, Fan Ye, Ning Li, 2014, 2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

A new demodulation method with diversity technique used in MB-OFDM UWB system

Fan Ye, Junyan Ren, Liang Liu, 2010, 2010 Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia).

A 5–10-Gb/s 12.5-mW Source Synchronous I/O Interface With 3-D Flip Chip Package

Shunli Ma, Qun Jane Gu, Junyan Ren, 2019, IEEE Transactions on Circuits and Systems I: Regular Papers.

A High-Speed High-Resolution Low-Distortion CMOS Bootstrapped Switch

Lei Wang, Junyan Ren, Wenjing Yin, 2007, 2007 IEEE International Symposium on Circuits and Systems.

A low power low voltage 16 bit audio ΣΔ modulator

Junyan Ren, Yi-ran Li, Jun Xu, 2009, 2009 IEEE International Symposium on Circuits and Systems.

A Monolithic Sub-sampling PLL based 6-18 GHz Frequency Synthesizer for C, X, Ku Band Communication

Wei Li, Ning Li, Junyan Ren, 2015, IEICE Trans. Electron..

A background time-skew calibration technique in flash-assisted time-interleaved SAR ADCs

Yimin Wu, Junyan Ren, Yongzhen Chen, 2017, 2017 IEEE 12th International Conference on ASIC (ASICON).

A 32.5-GS/s Sampler With Time-Interleaved Track-and-Hold Amplifier in 65-nm CMOS

Shunli Ma, Hao Yu, Junyan Ren, 2014, IEEE Transactions on Microwave Theory and Techniques.

Class-AB CMOS buffer with floating class-AB control

Peng Zhang, Junyan Ren, Fan Ye, 2011, 2011 9th IEEE International Conference on ASIC.

A 12-bit 100-MSps pipelined-SAR ADC with a time-interleaved second-stage

Fan Ye, Ning Li, Junyan Ren, 2014, 2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

A finite gain bandwidth compensation method for low power continuous-time ΣΔ modulator

Junyan Ren, Fan Ye, Jun Xu, 2013, 2013 IEEE 10th International Conference on ASIC.

Low-complexity synchronizer used in DC-OFDM UWB system

Hao Chen, Ning Li, Junyan Ren, 2013, 2013 IEEE 10th International Conference on ASIC.

Joint estimation for Carrier Frequency Offset and Sampling Frequency Offset in OFDM systems

Fan Ye, Jing Lin, Junyan Ren, 2014, 2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

A low-offset calibration-free comparator with a mismatch-suppressed dynamic preamplifier

Junyan Ren, Fan Ye, Huabin Chen, 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).

A sample-time error calibration technique in time-interleaved ADCs with correlation-based detection and voltage-controlled compensation

Junyan Ren, Yiwen Zhang, Fan Ye, 2012, 2012 IEEE Asia Pacific Conference on Circuits and Systems.

A Parallel Early-Pruned K-Best MIMO Signal Detector Up to 1.9Gb/s

Liang Liu, Junyan Ren, Fan Ye, 2011, Wirel. Pers. Commun..

A 5.5-GHz Power Amplifier For Wide Bandwidth Polar Modulator

Junyan Ren, L.C.N. de Vreede, Mihai Sanduleanu, 2006, 2006 8th International Conference on Solid-State and Integrated Circuit Technology Proceedings.

An 8.2 fJ/conversion-step 9-bit 135 MS/s SAR ADC with redundant methods for acceleration

Junyan Ren, Yongzhen Chen, Fan Ye, 2018, Microelectron. J..

A 12-bit 200-MS/s sample-and-hold amplifier with a hybrid Miller-Feedforward compensation technique

Junyan Ren, Yongzhen Chen, Fan Ye, 2013, 2013 IEEE 10th International Conference on ASIC.

A single-in-differential-out CMOS RF front-end for UWB 6–9GHz applications

Ting Gao, Ning Li, Feng Zhou, 2010, 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology.

A 20MHz BW 35fJ/conv. continuous-time ΣΔ modulator with single-opamp resonator using finite GBW compensation method

Junyan Ren, Jingjing Wang, Jun Xu, 2015, 2015 IEEE 11th International Conference on ASIC (ASICON).

An 8-bit 1-GS/s flash-assisted time-interleaved SAR ADC

Fan Ye, Jun Xu, Junyan Ren, 2014, 2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

Greedy Approach Based Heuristics for Partitioning Sparse Matrices

Wei Li, Junyan Ren, Jiasen Huang, 2015, IEICE Trans. Inf. Syst..

A 200MS/s, 11 bit SAR-assisted pipeline ADC with bias-enhanced ring amplifier

Junyan Ren, Yongzhen Chen, Jingjing Wang, 2017, 2017 IEEE International Symposium on Circuits and Systems (ISCAS).

Beyond-one-cycle loop delay CT ΔΣ modulators with proper rational NTF synthesis and time-interleaved quantizers

Jun Xu, Junyan Ren, Fan Jiang, 2013, 2013 IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS).

An overview of new design techniques for high performance CMOS millimeter-wave circuits

Shunli Ma, Hao Yu, Junyan Ren, 2014, 2014 International Symposium on Integrated Circuits (ISIC).

A 800 MS/s, 12-Bit, Ringamp-Based SAR assisted Pipeline ADC with Gain Error Cancellation

Junyan Ren, Yongzhen Chen, Fan Ye, 2018, 2018 IEEE International Symposium on Circuits and Systems (ISCAS).

A 270-MS/s 6-b SAR ADC with preamplifier sharing and self-locking comparators

Jiang Fan, Ye Fan, Junyan Ren, 2015, IEICE Electron. Express.

A 320MS/s 7-b flash-SAR ADC with preamplifier sharing technique

Junyan Ren, Fan Ye, Hang Hu, 2017, 2017 IEEE 12th International Conference on ASIC (ASICON).

A 6-bit 150 MHz competition encoding flash analog-to-digital converter

Junyan Ren, Zhaogang Wang, Cheng Chen, 2002, IEEE 2002 International Conference on Communications, Circuits and Systems and West Sino Expositions.

Power efficient SAR ADC with optimized settling technique

Fan Ye, Junyan Ren, Hao Zhou, 2013, 2013 IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS).

Iterative solution of ODE-PDE-AE systems for RF circuit simulation

Tan Jun, Junyan Ren, Jinmei Lai, 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

A High Performance Op-amp with Power-on Protection Technologies in Multi-power Domain SAR-assisted Pipeline ADC

Fan Ye, Junyan Ren, Yongzhen Chen, 2018, 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

QuickYield: An efficient global-search based parametric yield estimation with performance constraints

Yiyu Shi, Hao Yu, Fang Gong, 2010, Design Automation Conference.

A 30-GHz to 39-GHz mm-Wave low-power injection-locked frequency divider in 65nm CMOS

Shunli Ma, Ning Li, Junyan Ren, 2015, 2015 IEEE 11th International Conference on ASIC (ASICON).

A novel operational amplifier for low-voltage low-power SC circuits

Ning Li, Junyan Ren, Yao Guo, 2009, 2009 IEEE International Symposium on Circuits and Systems.

A 6.2–9.5 GHz UWB receiver for WiMedia MB-OFDM

Ting Gao, Ning Li, Feng Zhou, 2010, 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology.

A dual-mode VCO based low-power synthesizer with optimized automatic frequency calibration for software-defined radio

Wei Li, Ning Li, Jin Zhou, 2011, 2011 IEEE International Symposium of Circuits and Systems (ISCAS).

A Dividerless PLL With Low Power and Low Reference Spur by Aperture-Phase Detector and Phase-to-Analog Converter

Hao Yu, Kiat Seng Yeo, Wei Li, 2013, IEEE Transactions on Circuits and Systems I: Regular Papers.

A background time-skew calibration for flash-assisted time-interleaved SAR ADCS with redundant check bit

Fan Ye, Junyan Ren, Yongzhen Chen, 2014, 2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

Design and Analysis of Wide Frequency-Tuning-Range CMOS 60 GHz VCO by Switching Inductor Loaded Transformer

Hao Yu, Kiat Seng Yeo, Junyan Ren, 2014, IEEE Transactions on Circuits and Systems I: Regular Papers.

A 2.1-GHz PLL with −80dBc/−74dBc reference spur based on aperture-phase detector and phase-to-analog converter

Hao Yu, Kiat Seng Yeo, Wei Li, 2011, IEEE Asian Solid-State Circuits Conference 2011.

Analysis and design of low-jitter clock driver for wideband ADC

Long Cheng, Junyan Ren, Lei Luo, 2010, 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology.

Closed-loop, nonlinearity analysis and design of dual tuning, different control, high FOM two stage ring oscillator

Ning Li, Junyan Ren, Jing-jing Deng, 2008, 2008 9th International Conference on Solid-State and Integrated-Circuit Technology.

An Undersampling 10-bit 30.4-MSample/s Pipelined ADC

Fan Ye, Jun Xu, Junyan Ren, 2006, 2006 IEEE Asian Solid-State Circuits Conference.

A 0.87 mW 7MHz-BW 76dB-SNDR passive noise-shaping modulator based on a SAR ADC

Junyan Ren, Fan Ye, Hang Hu, 2017, 2017 IEEE 12th International Conference on ASIC (ASICON).

A 4.6GHz PLL with automatic frequency calibration based on multiple-pass ring oscillator

Junyan Ren, Fan Ye, Ping Lu, 2006 .

A 0.22 pJ/step subsampling ADC with fast input-tracking sampling and simplified opamp sharing

Cheng Chen, Ning Li, Junyan Ren, 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

No zero padded sparse matrix-vector multiplication on FPGAs

Lingli Wang, Junyan Ren, Jiasen Huang, 2014, 2014 International Conference on Field-Programmable Technology (FPT).

An all-pass true time delay circuit for wideband phased array application

Ning Li, Junyan Ren, Wei Li, 2014, 2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

An ARMA-Model-Based NTF Estimation on Continuous-Time $\Delta\Sigma$ Modulators

Junyan Ren, Fan Ye, Jun Xu, 2015, IEEE Transactions on Circuits and Systems II: Express Briefs.

Low phase noise injection-locked doubler-based quadrature CMOS VCO

Wei Li, Ning Li, Junyan Ren, 2011, 2011 9th IEEE International Conference on ASIC.

Efficient combined-demapping scheme for modified dual-carrier modulation

Fan Ye, Junyan Ren, Bing Jing, 2012, 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology.

A 5-to-8-GHz Wideband Miniaturized Dielectric Spectroscopy Chip With $I/Q$ Mismatch Calibration in 65-nm CMOS

Shunli Ma, Ning Li, Junyan Ren, 2018, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A 12bit asynchronous SAR-incremental sub-range ADC

Junyan Ren, Fan Ye, Hang Hu, 2017, 2017 IEEE 12th International Conference on ASIC (ASICON).

High Speed, Low Power Dynamic Comparator with Dynamic Biasing in Pre-amplifier Phase

Fan Ye, Junyan Ren, Yongzhen Chen, 2018, 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

A quadrature clock generator with calibration for 22∼31.4 GS/s real-time sampling system

Shunli Ma, Junyan Ren, Yongzhen Chen, 2015, ESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference (ESSCIRC).

I/Q imbalance estimation in OFDM systems

Junyan Ren, Fan Ye, Xuerong Zhou, 2015, 2015 IEEE 11th International Conference on ASIC (ASICON).

A 500-1000MS/s 12-bit resolution level-shift bootstrapped switch

Fan Ye, Junyan Ren, Jingjing Wang, 2014, 2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

A 6.2–9.5 GHz receiver for Wimedia MB-OFDM and China UWB standard

Ting Gao, Feng Zhou, Wei Li, 2010, Science China Information Sciences.

An Operational Amplifier Assisted Input Buffer and An Improved Bootstrapped Switch for High-Speed and High-Resolution ADCs

Junyan Ren, Yongzhen Chen, Fan Ye, 2018, 2018 IEEE International Symposium on Circuits and Systems (ISCAS).

An improved ring amplifier with process- and supply voltage-insensitive dead-zone

Fan Ye, Junyan Ren, Yongzhen Chen, 2017, 2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS).

A novel joint estimation and compensation algorithm for non-idealities of analog front-end in DC-OFDM system

Hao Chen, Junyan Ren, Fan Ye, 2013, 2013 IEEE 10th International Conference on ASIC.

A wideband and low power dual-band ASK transceiver for intra/inter-chip communication

Shunli Ma, Fan Ye, Qun Jane Gu, 2015, 2015 IEEE MTT-S International Microwave Symposium.

Carrier Frequency Offset and I/Q Imbalance Compensation for MB-OFDM Based UWB System

Jun Zhou, Liang Liu, Junyan Ren, 2013, Wirel. Pers. Commun..

A low kickback noise and offset calibrated dynamic comparator for 2B/C SAR ADC

Fan Ye, Junyan Ren, Hao Zhou, 2014, 2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

LVDS transmitter with optimized high power-efficiency 8:1 MUX

Qiang Zhang, Yimin Wu, Junyan Ren, 2015, 2015 IEEE 11th International Conference on ASIC (ASICON).

Digital encoding module used in a 6-bit 1.33-GS/s folding and interpolating ADC

Fan Ye, Junyan Ren, Zhiyuan Dai, 2016, 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

A High-Linearity Pipelined ADC With Opamp Split-Sharing in a Combined Front-End of S/H and MDAC1

Zhenyu Wang, Junyan Ren, Fan Ye, 2013, IEEE Transactions on Circuits and Systems I: Regular Papers.

A 80-dB DR, 10-MHz BW continuous-time sigma-delta modulator with low power comparators and switch drivers

Fan Jiang, Junyan Ren, Jun Xu, 2013, 2013 IEEE 10th International Conference on ASIC.

Design of new training sequence and estimation scheme for frequency dependent I/Q imbalance in MB-OFDM based UWB systems

Jun Zhou, Fan Ye, Junyan Ren, 2009, 2009 IEEE 8th International Conference on ASIC.

A 14-bit 200-MS/s time-interleaved ADC with sample-time error detection and cancelation

Peng Zhang, Bei Yu, Junyan Ren, 2011, IEEE Asian Solid-State Circuits Conference 2011.

A mixed sample-time error calibration technique in time-interleaved ADCs

Bei Yu, Junyan Ren, Fan Ye, 2013, IEICE Electron. Express.

A low-voltage differential injection locked divider with forward body bias

Wei Li, Ning Li, Junyan Ren, 2011, 2011 9th IEEE International Conference on ASIC.

An 8-bit 4fs-step digitally controlled delay element with two cascaded delay units

Hao Zhou, Junyan Ren, Fan Ye, 2015, 2015 IEEE 11th International Conference on ASIC (ASICON).

A 0.3∼17.2GHz frequency divider with capacitive degeneration in 130nm CMOS

Ning Li, Junyan Ren, Wei Li, 2012, 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology.

Output-dependent delay cancellation technique for high-accuracy current-steering DACs

Ning Li, Long Cheng, Junyan Ren, 2012, 2012 IEEE International Symposium on Circuits and Systems.

A 5.4GHz wide tuning range CMOS PLL using an auto-calibration multiple-pass ring oscillator

Ping Lu, Junyan Ren, Danfeng Chen, 2009, 2009 IEEE International SOC Conference (SOCC).

High speed low power Soft-Output Viterbi decoder

Fan Ye, Junyan Ren, Liang Liu, 2010, 2010 Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia).

A 12-bit 50-MS/s pipelined Analog-to-Digital Converter in 65nm CMOS

Ning Li, Junyan Ren, Guanghua Shu, 2010, 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology.

Low Power Low Noise Amplifier with DC Offset Correction at 1 V Supply Voltage for Ultrasound Imaging Systems

Yimin Wu, Junyan Ren, Fan Ye, 2018, 2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS).

Use Multilayer Perceptron in Calibrating Multistage Non-linearity of Split Pipelined-ADC

Junyan Ren, Fan Ye, Tianli Zhang, 2018, 2018 IEEE International Symposium on Circuits and Systems (ISCAS).

A 7 bit 1 GS/s pipelined folding and interpolating ADC with coarse-stage-free joint encoding

Li Lin, Junyan Ren, Fan Ye, 2014, IEICE Electron. Express.

A 80–400 MHz 74 dB-DR Gm-C low-pass filter with a unique auto-tuning system

Ting Gao, Wei Li, Ning Li, 2011, 16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011).

High speed digital ELD compensation with hybrid thermometer coding in CT ΔΣ modulators

Fan Ye, Junyan Ren, Chixiao Chen, 2017, 2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS).

A 100MS/S 12-bit Coarse-Fine SAR ADC with Shared Split-CDAC

Junyan Ren, Yongzhen Chen, Fan Ye, 2018, 2018 IEEE International Symposium on Circuits and Systems (ISCAS).

Design of Ultra-Low-Power 60-GHz Direct-Conversion Receivers in 65-nm CMOS

Hao Yu, Junyan Ren, Yang Shang, 2013, IEEE Transactions on Microwave Theory and Techniques.

An input buffer for 12bit 2GS/s ADC

Junyan Ren, Yongzhen Chen, Fan Ye, 2017, 2017 IEEE 12th International Conference on ASIC (ASICON).

A 7.8 fJ/conversion-step 9-bit 400-MS/s single-channel SAR ADC with fast control logic

Junyan Ren, Yongzhen Chen, Fan Ye, 2018, 2018 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS).

A 24-GHz novel true-time-delay phase shifter utilizing negative group delay compensation

Ning Li, Junyan Ren, Wei Li, 2016, 2016 IEEE International Symposium on Phased Array Systems and Technology (PAST).

Joint estimation and compensation for front-end imperfection in MB-OFDM UWB systems

Jun Zhou, Liang Liu, Junyan Ren, 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

A fractional-N frequency synthesizer for cellular and short range multi-standard wireless receiver

Wei Li, Ning Li, Jin Zhou, 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

A 0.4–6-GHz Frequency Synthesizer Using Dual-Mode VCO for Software-Defined Radio

Ning Li, Jin Zhou, Junyan Ren, 2013, IEEE Transactions on Microwave Theory and Techniques.

A 400-MS/s 8-b 2-b/cycle SAR ADC with shared interpolator and alternative comparators

Shunli Ma, Junyan Ren, Fan Ye, 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).

Automatic gain control algorithm with high-speed and double closed-loop in UWB system

Ning Li, Junyan Ren, Bing Jing, 2013, 2013 IEEE 10th International Conference on ASIC.

A 1.2V CMOS RSSI with 500MHz bandwidth and 90dB dynamic range

Ting Gao, Ning Li, Junyan Ren, 2010, 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology.

A 12-Bit ENOB 8MHz BW Noise-Shaping SAR ADC Using High-Speed Switches

Junyan Ren, Yongzhen Chen, Fan Ye, 2018, 2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS).

Carrier Frequency Offset estimation in the Presence of I/Q Mismatch for Wideband OFDM systems

Xiaolong Wang, Fan Ye, Liang Liu, 2012, 2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS).

Design of Highly-Parallel, 2.2Gbps Throughput Signal Detector for MIMO Systems

Liang Liu, Junyan Ren, Fan Ye, 2008, 2008 IEEE International Conference on Communications.

A Novel Ring Amplifier with Low Common-Mode Voltage Variation and Noise Reduction Using Floating Power Technique

Fan Ye, Junyan Ren, Yan Zheng, 2021, 2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS).

Additive Neural Network Based Static and Dynamic Distortion Modeling for Prior-Knowledge-Free Nyquist ADC Characterization

Fan Ye, Junyan Ren, Chixiao Chen, 2021, 2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS).

A High Linearity and Low Noise Anti-Aliasing Filter for ADCs

Fan Ye, Junyan Ren, Hao Chi, 2021, 2021 IEEE 14th International Conference on ASIC (ASICON).

A 5-bit High-Linearity, Binary-Recombination-Redundancy Sub-SAR ADC in 300MS/s, 14-bit Pipelined-SAR ADC

Fan Ye, Junyan Ren, Guoyao Wu, 2021, 2021 IEEE 14th International Conference on ASIC (ASICON).

An 11-Bit 500 MS/s Two-Step SAR ADC with Non-Attenuated Passive Residue Transfer

Fan Ye, Junyan Ren, Wenbin He, 2021, 2021 IEEE International Symposium on Circuits and Systems (ISCAS).

Machine Learning based Prior-Knowledge-Free Nyquist ADC Characterization and Calibration

Fan Ye, Junyan Ren, Chixiao Chen, 2021, 2021 18th International SoC Design Conference (ISOCC).

Resistive Degeneration Linearization Dynamic Residue Amplifiers for Pipelined ADCs

Fan Ye, Junyan Ren, Guoyao Wu, 2021, 2021 18th International SoC Design Conference (ISOCC).

Effective Gain Analysis and Statistic Based Calibration for Ring Amplifier With Robustness to PVT Variation

Fan Ye, Junyan Ren, Yongzhen Chen, 2022, IEEE Transactions on Circuits and Systems II: Express Briefs.

A 12-bit 100MS/s SAR ADC With Equivalent Split-Capacitor and LSB-Averaging in 14-nm CMOS FinFET

Fan Ye, Junyan Ren, Yan Zheng, 2021, IEEE Access.

A Partially Binarized and Fixed Neural Network Based Calibrator for SAR-Pipelined ADCs Achieving 95.0-dB SFDR

Fan Ye, Junyan Ren, Yutong Zhao, 2021, 2021 IEEE International Symposium on Circuits and Systems (ISCAS).

A 68.36 dB 12 bit 100MS/s SAR ADC with a low-noise comparator in 14-nm CMOS FinFet

Fan Ye, Junyan Ren, Yan Zheng, 2021, 2021 IEEE 14th International Conference on ASIC (ASICON).

A Hardware-Efficient Calibrator for SAR-Pipelined ADCs with a Layer-based Sharing Neural Network

Fan Ye, Junyan Ren, Nuo Xu, 2021, 2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS).

A 35-to-50 GHz CMOS Low-Noise Amplifier with 22.2% -1-dB Fractional Bandwidth and 30.5-dB Maximum Gain for 5G New Radio

Junyan Ren, Tianxiang Wu, Dong Wei, 2021, ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference (ESSCIRC).

A 6.94-fJ/Conversion-Step 12-bit 100-MS/s Asynchronous SAR ADC Exploiting Split-CDAC in 65-nm CMOS

Shunli Ma, Fan Ye, Junyan Ren, 2021, IEEE Access.

A 1-GS/s 6-bit folding and interpolating ADC in 0.13-μm CMOS

Fan Ye, Junyan Ren, Kai Zhu, 2009 .

A 60.8–67GHz and 6.3mW injection-locked frequency divider with switching-inductor loaded transformer in 65nm CMOS

Junyan Ren, Haipeng Fu, Wei Fei, 2014, 2014 IEEE MTT-S International Microwave Symposium (IMS2014).

A 76 GHz oscillator by high-Q differential transmission line loaded with split ring resonator in 65-nm CMOS

Kiat Seng Yeo, Junyan Ren, Yang Shang, 2013, 2013 IEEE 13th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems.

Periodic steady state solution of coupled PDE-ODE system for CMOS RF circuit simulation

Junyan Ren, Jinmei Lai, Xinyu Wu, 2002, IEEE 2002 International Conference on Communications, Circuits and Systems and West Sino Expositions.

An 8mW ultra low power 60GHz direct-conversion receiver with 55dB gain and 4.9dB noise figure in 65nm CMOS

Junyan Ren, Wei Fei, Yang Shang, 2012, 2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT).

An improved Phase/Frequency Detector and a glitch-suppression charge pump design for PLL applications

Ning Li, Junyan Ren, Wei Li, 2010, 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology.