Steven J. E. Wilton

发表

Alan J. Hu, Flavio M. de Paula, Marcel Gort, 2008, 2008 Ninth International Workshop on Microprocessor Test and Verification.

An analytical model describing the relationships between logic architecture and FPGA density

Wayne Luk, Philip Heng Wai Leong, Steven J. E. Wilton, 2008, 2008 International Conference on Field Programmable Logic and Applications.

An adaptive virtual overlay for fast trigger insertion for FPGA debug

Steven J. E. Wilton, Fatemeh Eslami, S. Wilton, 2015, 2015 International Conference on Field Programmable Technology (FPT).

A crosstalk-aware timing-driven router for FPGAs

Steven J. E. Wilton, S. Wilton, 2001, FPGA '01.

Towards Analytical Methods for FPGA Architecture Investigation

Steven J. E. Wilton, 2010, ARC.

Concentrator access networks for programmable logic cores on SoCs

Steven J. E. Wilton, Bradley R. Quinton, S. Wilton, 2005, 2005 IEEE International Symposium on Circuits and Systems.

CACTI: an enhanced cache access and cycle time model

Norman P. Jouppi, Steven J. E. Wilton, N. Jouppi, 1996, IEEE J. Solid State Circuits.

Removal-Cost Method: An efficient voltage selection algorithm for multi-core platforms under PVT

Rabab Kreidieh Ward, Resve A. Saleh, Steven J. E. Wilton, 2009, 2009 IEEE International SOC Conference (SOCC).

Using Round-Robin Tracepoints to debug multithreaded HLS circuits on FPGAs

Steven J. E. Wilton, Jeffrey B. Goeders, 2015, 2015 International Conference on Field Programmable Technology (FPT).

An Improved Overlay and Mapping Algorithm Supporting Rapid Triggering for FPGA Debug

Steven J. E. Wilton, Fatemeh Eslami, S. Wilton, 2017, CARN.

Clock-Aware Placement for FPGAs

Steven J. E. Wilton, Julien Lamoureux, S. Wilton, 2007, 2007 International Conference on Field Programmable Logic and Applications.

The memory/logic interface in FPGAs with large embedded memory arrays

Steven J. E. Wilton, Jonathan Rose, Zvonko G. Vranesic, 1999, IEEE Trans. Very Large Scale Integr. Syst..

Detailed routing architectures for embedded programmable logic IP cores

Steven J. E. Wilton, Peter Hallschmid, S. Wilton, 2001, FPGA '01.

Structural analysis and generation of synthetic digital circuits with memory

Steven J. E. Wilton, Jonathan Rose, Zvonko G. Vranesic, 2001, IEEE Trans. Very Large Scale Integr. Syst..

Routing architecture optimizations for high-density embedded programmable IP cores

Steven J. E. Wilton, Peter Hallschmid, S. Wilton, 2005, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

BackSpace: Formal Analysis for Post-Silicon Debug

Alan J. Hu, Flavio M. de Paula, Marcel Gort, 2008, 2008 Formal Methods in Computer-Aided Design.

Architecture Exploration for HLS-Oriented FPGA Debug Overlays

Steven J. E. Wilton, Jeffrey B. Goeders, Al-Shahna Jamal, 2018, FPGA.

On evaluating signal selection algorithms for post-silicon debug

Steven J. E. Wilton, Eddie Hung, S. Wilton, 2011, 2011 12th International Symposium on Quality Electronic Design.

Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), Tampere, Finland, August 24-26, 2005

Steven J. E. Wilton, Philip H. W. Leong, Tero Rissa, 2005, FPL.

Activity Estimation for Field-Programmable Gate Arrays

Steven J. E. Wilton, Julien Lamoureux, S. Wilton, 2006, 2006 International Conference on Field Programmable Logic and Applications.

Concurrently optimizing FPGA architecture parameters and transistor sizing: Implications for FPGA design

Steven J. E. Wilton, Peter Y. K. Cheung, George A. Constantinides, 2009, 2009 International Conference on Field-Programmable Technology.

On the Interaction between Power-Aware Computer-Aided Design Algorithms for Field-Programmable Gate Arrays

Steven J. E. Wilton, Julien Lamoureux, S. Wilton, 2005, J. Low Power Electron..

Dynamic voltage scaling for commercial FPGAs

Wayne Luk, Philip Heng Wai Leong, Steven J. E. Wilton, 2005, Proceedings. 2005 IEEE International Conference on Field-Programmable Technology, 2005..

On the sensitivity of FPGA architectural conclusions to experimental assumptions, tools, and techniques

Steven J. E. Wilton, Rebecca Cheng, Andy Yan, 2002, FPGA '02.

Deterministic Timing-Driven Parallel Placement by Simulated Annealing Using Half-Box Window Decomposition

Guy Lemieux, Steven J. E. Wilton, Jeffrey B. Goeders, 2011, 2011 International Conference on Reconfigurable Computing and FPGAs.

Power Implications of Implementing Logic Using FPGA Embedded Memory Arrays

Steven J. E. Wilton, Scott Y. L. Chin, Clarence S. P. Lee, 2006, 2006 International Conference on Field Programmable Logic and Applications.

Floating-Point FPGA: Architecture and Modeling

Wayne Luk, Philip Heng Wai Leong, Steven J. E. Wilton, 2009, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Improving the memory footprint and runtime scalability of FPGA CAD algorithms

Steven J. E. Wilton, Scott Y. L. Chin, 2009, 2009 International Conference on Field Programmable Logic and Applications.

Product-term-based synthesizable embedded programmable logic cores

Steven J. E. Wilton, Andy Yan, S. Wilton, 2003, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Wirelength modeling for homogeneous and heterogeneous FPGA architectural development

Steven J. E. Wilton, Alastair M. Smith, Joydip Das, 2009, FPGA '09.

Using Dynamic Signal-Tracing to Debug Compiler-Optimized HLS Circuits on FPGAs

Steven J. E. Wilton, Jeffrey B. Goeders, 2015, 2015 IEEE 23rd Annual International Symposium on Field-Programmable Custom Computing Machines.

Sequence pair based voltage island floorplanning

André Ivanov, Resve A. Saleh, Andreas G. Veneris, 2011, 2011 International Green Computing Conference and Workshops.

Structural analysis and generation of synthetic digital circuits with memory : Reconfigurable and Adaptive VLSI Systems

Steven J. E. Wilton, Jonathan Rose, Zvonko G. Vranesic, 2001 .

Logical-to-Physical Memory Mapping for FPGAs with Dual-Port Embedded Arrays

Steven J. E. Wilton, William K. C. Ho, 1999, FPL.

A detailed delay path model for FPGAs

Philip Heng Wai Leong, Haile Yu, Steven J. E. Wilton, 2009, 2009 International Conference on Field-Programmable Technology.

A New Switch Block for Segmented FPGAs

Steven J. E. Wilton, M. Imran Masud, S. Wilton, 1999, FPL.

Charge-borrowing decap: A novel circuit for removal of local supply noise violations

Resve A. Saleh, Steven J. E. Wilton, Xiongfei Meng, 2009, 2009 IEEE Custom Integrated Circuits Conference.

An analytical model relating FPGA architecture parameters to routability

Steven J. E. Wilton, Joydip Das, S. Wilton, 2011, FPGA '11.

Virtual Embedded Blocks: A Methodology for Evaluating Embedded Elements in FPGAs

Wayne Luk, Philip Heng Wai Leong, Steven J. E. Wilton, 2006, 2006 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines.

A novel FPGA architecture supporting wide shallow memories

Steven J. E. Wilton, S. W. Oldridge, S. Wilton, 2001, Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169).

GlitchLess: an active glitch minimization technique for FPGAs

Guy Lemieux, Steven J. E. Wilton, Julien Lamoureux, 2007, FPGA '07.

Tradeoffs in two-level on-chip caching

Norman P. Jouppi, Steven J. E. Wilton, 1994, ISCA '94.

Rapid Triggering Capability Using an Adaptive Overlay during FPGA Debug

Steven J. E. Wilton, Fatemeh Eslami, S. Wilton, 2018, ACM Trans. Design Autom. Electr. Syst..

Towards simulator-like observability for FPGAs: a virtual overlay network for trace-buffers

Steven J. E. Wilton, Eddie Hung, 2013, FPGA '13.

RAW Introduction and Committees

Wayne Luk, Jürgen Becker, Ken Eguro, 2015, 2016 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW).

Editorial - Field-programmable logic and applications

Steven J. E. Wilton, T. Rissa, 2006 .

Enhanced source-level instrumentation for FPGA in-system debug of High-Level Synthesis designs

Steven J. E. Wilton, Jose P. Pinilla, 2016, 2016 International Conference on Field-Programmable Technology (FPT).

An analytical model relating FPGA architecture and place and route runtime

Steven J. E. Wilton, Scott Y. L. Chin, S. Wilton, 2009, 2009 International Conference on Field Programmable Logic and Applications.

The impact of interconnect architecture on via-programmed structured ASICs (VPSAs)

Guy Lemieux, Steven J. E. Wilton, Usman Ahmed, 2010, FPGA '10.

Escaping the Academic Sandbox: Realizing VPR Circuits on Xilinx Devices

Steven J. E. Wilton, Fatemeh Eslami, Eddie Hung, 2013, 2013 IEEE 21st Annual International Symposium on Field-Programmable Custom Computing Machines.

Architecture and CAD for FPGA Clock Networks

Steven J. E. Wilton, Julien Lamoureux, S. Wilton, 2006, 2006 International Conference on Field Programmable Logic and Applications.

LeFlow: Enabling Flexible FPGA High-Level Synthesis of Tensorflow Deep Neural Networks pdf

Steven J. E. Wilton, Daniel H. Noronha, Bahar Salehpour, 2018, ArXiv.

A detailed power model for field-programmable gate arrays

Steven J. E. Wilton, Andy Yan, K. K. Poon, 2005, TODE.

A configurable architecture to limit wakeup current in dynamically-controlled power-gated FPGAs

Steven J. E. Wilton, Assem A. M. Bsoul, S. Wilton, 2012, FPGA '12.

Architectures and algorithms for synthesizable embedded programmable logic cores

Steven J. E. Wilton, Noha Kafafi, Kimberly Bozman, 2003, FPGA '03.

High-level synthesis-based design methodology for Dynamic Power-Gated FPGAs

Steven J. E. Wilton, Rehan Ahmed, Peter Hallschmid, 2014, 2014 24th International Conference on Field Programmable Logic and Applications (FPL).

Hierarchical Dynamic Power-Gating in FPGAs

Steven J. E. Wilton, Rehan Ahmed, Peter Hallschmid, 2015, ARC.

VersaPower: Power estimation for diverse FPGA architectures

Steven J. E. Wilton, Jeffrey B. Goeders, S. Wilton, 2012, 2012 International Conference on Field-Programmable Technology.

Simultaneous Inference and Training Using On-FPGA Weight Perturbation Techniques

Steven J. E. Wilton, David Boland, Philip H. W. Leong, 2018, 2018 International Conference on Field-Programmable Technology (FPT).

Post-silicon debug using programmable logic cores

Steven J. E. Wilton, Bradley R. Quinton, 2005, Proceedings. 2005 IEEE International Conference on Field-Programmable Technology, 2005..

Architecture of Centralized Field-Configurable Memory

Steven J. E. Wilton, Jonathan Rose, Zvonko G. Vranesic, 1995, Third International ACM Symposium on Field-Programmable Gate Arrays.

A Flexible Power Model for FPGAs

Steven J. E. Wilton, Andy Yan, K. K. Poon, 2002, FPL.

Limitations of incremental signal-tracing for FPGA debug

Steven J. E. Wilton, Eddie Hung, S. Wilton, 2012, 22nd International Conference on Field Programmable Logic and Applications (FPL).

Emulation in post-silicon validation: It's not just for functionality anymore

Alan J. Hu, Steven J. E. Wilton, Amir Nahir, 2012, 2012 IEEE International High Level Design Validation and Test Workshop (HLDVT).

Sensitivity of FPGA power evaluation

Steven J. E. Wilton, Kara K. W. Poon, 2002, 2002 IEEE International Conference on Field-Programmable Technology, 2002. (FPT). Proceedings..

Effective FPGA debug for high-level synthesis generated circuits

Steven J. E. Wilton, Jeffrey B. Goeders, S. Wilton, 2014, 2014 24th International Conference on Field Programmable Logic and Applications (FPL).

Accelerated FPGA architecture design: Capabilities and limitations of analytical models

Steven J. E. Wilton, Joydip Das, S. Wilton, 2011, 2011 International Conference on Field-Programmable Technology.

A synthesizable datapath-oriented embedded FPGA fabric

Wayne Luk, Philip Heng Wai Leong, Steven J. E. Wilton, 2007, FPGA '07.

An FPGA with power-gated switch blocks

Steven J. E. Wilton, Assem A. M. Bsoul, S. Wilton, 2012, 2012 International Conference on Field-Programmable Technology.

A system-level stochastic circuit generator for FPGA architecture evaluation

Steven J. E. Wilton, Cindy Mark, Ava Shui, 2008, 2008 International Conference on Field-Programmable Technology.

FPGA clock network architecture: flexibility vs. area and power

Steven J. E. Wilton, Julien Lamoureux, S. Wilton, 2006, FPGA '06.

Allowing Software Developers to Debug HLS Hardware pdf

Steven J. E. Wilton, Jeffrey B. Goeders, 2015, ArXiv.

GlitchLess: Dynamic Power Minimization in FPGAs Through Edge Alignment and Glitch Filtering

Guy Lemieux, Steven J. E. Wilton, Julien Lamoureux, 2008, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Kibo: An Open-Source Fixed-Point Tool-kit for Training and Inference in FPGA-Based Deep Learning Networks

Philip Heng Wai Leong, Steven J. E. Wilton, Daniel Holanda Noronha, 2018, 2018 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW).

Faster FPGA Debug: Efficiently Coupling Trace Instruments with User Circuitry

Steven J. E. Wilton, Jeffrey B. Goeders, Eddie Hung, 2014, ARC.

Modeling post-techmapping and post-clustering FPGA circuit depth

Wayne Luk, Philip Heng Wai Leong, Steven J. E. Wilton, 2009, 2009 International Conference on Field Programmable Logic and Applications.

Formal-Analysis-Based Trace Computation for Post-Silicon Debug

Alan J. Hu, Flavio M. de Paula, Marcel Gort, 2012, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

An Analytical Model Relating FPGA Architecture to Logic Density and Depth

Wayne Luk, Philip Heng Wai Leong, Steven J. E. Wilton, 2011, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Post-silicon code coverage for multiprocessor system-on-chip designs

Alan J. Hu, André Ivanov, Steven J. E. Wilton, 2013, IEEE Transactions on Computers.

Optimizing coarse-grained units in floating point hybrid FPGA

Wayne Luk, Philip Heng Wai Leong, Steven J. E. Wilton, 2008, 2008 International Conference on Field-Programmable Technology.

On the Interaction Between Power-Aware FPGA CAD Algorithms

Steven J. E. Wilton, Julien Lamoureux, 2003, ICCAD.

Speculative Debug Insertion for FPGAs

Steven J. E. Wilton, Eddie Hung, 2011, 2011 21st International Conference on Field Programmable Logic and Applications.

An embedded flexible content-addressable memory core for inclusion in a Field-Programmable Gate Array

Steven J. E. Wilton, Julien Lamoureux, Christopher W. Jones, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, FPGA 2005, Monterey, California, USA, February 20-22, 2005

Steven J. E. Wilton, Herman Schmit, 2005, FPGA.

Memory Footprint Reduction for FPGA Routing Algorithms

Steven J. E. Wilton, Scott Y. L. Chin, S. Wilton, 2007, 2007 International Conference on Field-Programmable Technology.

Energy Optimization for Many-Core Platforms: Communication and PVT Aware Voltage-Island Formation and Voltage Selection Algorithm

Rabab Kreidieh Ward, Resve A. Saleh, Steven J. E. Wilton, 2010, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Domain-Specific Hybrid FPGA: Architecture and Floating Point Applications

Wayne Luk, Philip Heng Wai Leong, Steven J. E. Wilton, 2007, 2007 International Conference on Field Programmable Logic and Applications.

Session 14 - Advanced SoCs - techniques and applications

Steven J. E. Wilton, Arif Rahman, 2008, CICC.

Macrocell Architectures for Product Term Embedded Memory Arrays

Steven J. E. Wilton, Ernie Lin, 2001, FPL.

Fast Turnaround HLS Debugging Using Dependency Analysis and Debug Overlays

Steven J. E. Wilton, Jeffrey B. Goeders, Al-Shahna Jamal, 2020, ACM Trans. Reconfigurable Technol. Syst..

Quantifying observability for in-system debug of high-level synthesis circuits

Steven J. E. Wilton, Jeffrey B. Goeders, 2016, 2016 26th International Conference on Field Programmable Logic and Applications (FPL).

Architectural support for block transfers in a shared-memory multiprocessor

Steven J. E. Wilton, Zvonko G. Vranesic, 1993, Proceedings of 1993 5th IEEE Symposium on Parallel and Distributed Processing.

Practical Asynchronous Interconnect Network Design

Mark R. Greenstreet, Steven J. E. Wilton, Bradley R. Quinton, 2008, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

WRL Research Report 93/5: An Enhanced Access and Cycle Time Model for On-chip Caches

Norman P. Jouppi, Steven J. E. Wilton, N. Jouppi, 1994 .

Power Aware Architecture Exploration for Field Programmable Gate Arrays

Steven J. E. Wilton, Jeffrey B. Goeders, 2014, J. Low Power Electron..

Heterogeneous technology mapping for FPGAs with dual-port embedded memory arrays

Steven J. E. Wilton, 2000, FPGA '00.

Product-Term-Based Synthesizable Embedded Programmable Logic Cores

Steven J. E. Wilton, Andy Yan, 2006, IEEE Trans. Very Large Scale Integr. Syst..

On the trade-off between power and flexibility of FPGA clock networks

Steven J. E. Wilton, Julien Lamoureux, S. Wilton, 2008, TRETS.

Scalable Signal Selection for Post-Silicon Debug

Steven J. E. Wilton, Eddie Hung, 2013, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Rapid circuit-specific inlining tuning for FPGA high-level synthesis

Steven J. E. Wilton, Jose P. Pinilla, Daniel H. Noronha, 2017, 2017 International Conference on ReConFigurable Computing and FPGAs (ReConFig).

Memory-to-memory connection structures in FPGAs with embedded memory arrays

Steven J. E. Wilton, Jonathan Rose, Zvonko G. Vranesic, 1997, FPGA '97.

Steven J. E. Wilton, Zion S. Kwok, Zion Kwok, 2005, 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'05).

Performance and Cost Tradeoffs in Metal-Programmable Structured ASICs (MPSAs)

Guy Lemieux, Steven J. E. Wilton, Usman Ahmed, 2011, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Rapid RTL-based signal ranking for FPGA prototyping

Steven J. E. Wilton, Bradley R. Quinton, Eddie Hung, 2012, 2012 International Conference on Field-Programmable Technology.

Linking the Verification and Validation of Complex Integrated Circuits Through Shared Coverage Metrics

Steven J. E. Wilton, Bradley R. Quinton, Eddie Hung, 2013, IEEE Design & Test.

An SRAM-programmable field-configurable memory

Steven J. E. Wilton, Jonathan Rose, T. Ngai, 1995, Proceedings of the IEEE 1995 Custom Integrated Circuits Conference.

Advances in programmable logic

Steven J. E. Wilton, Albert Stritter, 2005, CICC.

Accelerating FPGA debug: Increasing visibility using a runtime reconfigurable observation and triggering network

Steven J. E. Wilton, Eddie Hung, 2014, TODE.

Interconnect architectures for modulo-scheduled coarse-grained reconfigurable arrays

Steven J. E. Wilton, Serge Vernalde, Bingfeng Mei, 2004, Proceedings. 2004 IEEE International Conference on Field- Programmable Technology (IEEE Cat. No.04EX921).

Programmable Logic Core Enhancements for High-Speed On-Chip Interfaces

Steven J. E. Wilton, Bradley R. Quinton, S. Wilton, 2009, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

An FPGA Overlay Architecture Supporting Rapid Implementation of Functional Changes during On-Chip Debug

Steven J. E. Wilton, Jeffrey B. Goeders, Al-Shahna Jamal, 2018, 2018 28th International Conference on Field Programmable Logic and Applications (FPL).

Enabling Effective FPGA Debug using Overlays: Opportunities and Challenges pdf

Steven J. E. Wilton, Fatemeh Eslami, Eddie Hung, 2016, ArXiv.

Runtime-Controlled Energy Reduction Techniques for FPGAs

Steven J. E. Wilton, Assem A. M. Bsoul, Stuart Dueck, 2016 .

Activity-based power estimation and characterization of DSP and multiplier blocks in FPGAs

Steven J. E. Wilton, Nathalie Chan King Choy, S. Wilton, 2006, 2006 IEEE International Conference on Field Programmable Technology.

Heterogeneous technology mapping for area reduction in FPGAs withembedded memory arrays

Steven J. E. Wilton, S. Wilton, 2000, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

SMAP: heterogeneous technology mapping for area reduction in FPGAs with embedded memory arrays

Steven J. E. Wilton, S. Wilton, 1998, FPGA '98.

Incremental distributed trigger insertion for efficient FPGA debug

Steven J. E. Wilton, Fatemeh Eslami, S. Wilton, 2014, 2014 24th International Conference on Field Programmable Logic and Applications (FPL).

Proceedings of the ACM/SIGDA 14th International Symposium on Field Programmable Gate Arrays, FPGA 2006, Monterey, California, USA, February 22-24, 2006

Steven J. E. Wilton, Andre Dehon, 2006, FPGA.

Towards scalable FPGA CAD through architecture

Steven J. E. Wilton, Scott Y. L. Chin, S. Wilton, 2011, FPGA '11.

A Configurable Architecture to Limit Inrush Current in Power-Gated Reconfigurable Devices

Steven J. E. Wilton, Assem A. M. Bsoul, 2014, J. Low Power Electron..

Static and Dynamic Memory Footprint Reduction for FPGA Routing Algorithms

Steven J. E. Wilton, Scott Y. L. Chin, S. Wilton, 2009, TRETS.

Extending post-silicon coverage measurement using time-multiplexed FPGA overlays

Steven J. E. Wilton, Fatemeh Eslami, Eddie Hung, 2018, 2018 IEEE 23rd European Test Symposium (ETS).

Systems-on-Chip on FPGAs

Steven J. E. Wilton, Jeffrey B. Goeders, Lesley Shannon, 2016, FPGAs for Software Programmers.

Syncopation: Adaptive Clock Management for High-Level Synthesis Generated Circuits on FPGAs

Steven J. E. Wilton, Daniel Holanda Noronha, Kahlan Gibson, 2020, 2020 30th International Conference on Field-Programmable Logic and Applications (FPL).

Placement and routing for non-rectangular embedded programmable logic cores in SoC design

Steven J. E. Wilton, Tony Wong, S. Wilton, 2004, Proceedings. 2004 IEEE International Conference on Field- Programmable Technology (IEEE Cat. No.04EX921).

Programmable logic IP cores in SoC design: opportunities and challenges

Steven J. E. Wilton, Resve Saleh, S. Wilton, 2001, Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169).

A VLSI implementation of a cascade Viterbi decoder with traceback

P. Glenn Gulak, Steven J. E. Wilton, Paul Chow, 1993, 1993 IEEE International Symposium on Circuits and Systems.

Accelerating in-system FPGA debug of high-level synthesis circuits using incremental compilation techniques

Steven J. E. Wilton, Jeffrey B. Goeders, Pavan Kumar Bussa, 2017, 2017 27th International Conference on Field Programmable Logic and Applications (FPL).

Advances in 3D design and optimization

Visvesh Sathe, Steven J. E. Wilton, 2012, Proceedings of the IEEE 2012 Custom Integrated Circuits Conference.

Reconfigurable computing: architectures and design methods

Wayne Luk, Steven J. E. Wilton, Peter Y. K. Cheung, 2005 .

An FPGA architecture supporting dynamically controlled power gating

Steven J. E. Wilton, Assem A. M. Bsoul, S. Wilton, 2010, 2010 International Conference on Field-Programmable Technology.

The Coarse-Grained / Fine-Grained Logic Interface in FPGAs with Embedded Floating-Point Arithmetic Units

Wayne Luk, Steven J. E. Wilton, Philip H. W. Leong, 2008 .

Optimizing Floating Point Units in Hybrid FPGAs

Wayne Luk, Philip Heng Wai Leong, Steven J. E. Wilton, 2012, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

On the Power Dissipation of Embedded Memory Blocks Used to Implement Logic in Field-Programmable Gate Arrays

Steven J. E. Wilton, Scott Y. L. Chin, Clarence S. P. Lee, 2008, Int. J. Reconfigurable Comput..

Signal-Tracing Techniques for In-System FPGA Debugging of High-Level Synthesis Circuits

Steven J. E. Wilton, Jeffrey B. Goeders, S. Wilton, 2017, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Asynchronous IC interconnect network design and implementation using a standard ASIC flow

Mark R. Greenstreet, Steven J. E. Wilton, Bradley R. Quinton, 2005, 2005 International Conference on Computer Design.

Memory/logic interconnect flexibility in FPGAs with large embedded memory arrays

Steven J. E. Wilton, Jonathan Rose, Z. G. Vrancsic, 1996, Proceedings of Custom Integrated Circuits Conference.

Implementing logic in FPGA embedded memory arrays: architectural implications

Steven J. E. Wilton, S. Wilton, 1998, Proceedings of the IEEE 1998 Custom Integrated Circuits Conference (Cat. No.98CH36143).

FPGA Implementation of a Prototype WDM On-Line Scheduler

Steven J. E. Wilton, Babak Hamidzadeh, Winnie W. Cheng, 2000, FPL.

Placement and routing for FPGA architectures supporting wide shallow memories

Steven J. E. Wilton, Steven W. Oldridge, 2003, Proceedings. 2003 IEEE International Conference on Field-Programmable Technology (FPT) (IEEE Cat. No.03EX798).

Embedded memory in FPGAs: recent research results

Steven J. E. Wilton, 1999, 1999 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (PACRIM 1999). Conference Proceedings (Cat. No.99CH36368).

Architecture of cluster-based FPGAs with memory

Steven J. E. Wilton, J. P. Clifford, 2000, Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No.00CH37044).

Maximum flow algorithms for maximum observability during FPGA debug

Steven J. E. Wilton, Eddie Hung, Al-Shahna Jamal, 2013, 2013 International Conference on Field-Programmable Technology (FPT).

A CPED-based RC-4 Crac king System

Alan J. Hu, Steven J. E. Wilton, Paul D. Kundarewich, 1999 .

Implementing logic in FPGA memory arrays: heterogeneous memory architectures

Steven J. E. Wilton, S. Wilton, 2002, 2002 IEEE International Conference on Field-Programmable Technology, 2002. (FPT). Proceedings..

The Impact of Pipelining on Energy per Operation in Field-Programmable Gate Arrays

Wayne Luk, Steven J. E. Wilton, Su-Shin Ang, 2004, FPL.

A novel FPGA architecture supporting wide, shallow memories

Steven J. E. Wilton, Steven W. Oldridge, S. Wilton, 2005, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Challenges and opportunities for low power FPGAs in nanometer technologies

Lei He, Steven J. E. Wilton, Tim Tuan, 2005, ISLPED '05.

System-on-Chip: Reuse and Integration

Shahriar Mirabbasi, Guy Lemieux, Alan J. Hu, 2006, Proceedings of the IEEE.

Layout-Aware Embedding for Quantum Annealing Processors

Steven J. E. Wilton, Jose P. Pinilla, S. Wilton, 2019, ISC.

An Overlay for Rapid FPGA Debug of Machine Learning Applications

Zhiqiang Que, Wayne Luk, Steven J. E. Wilton, 2019, 2019 International Conference on Field-Programmable Technology (ICFPT).

Architectures and algorithms for field-programmable gate arrays with embedded memory

Steven J. E. Wilton, Jonathan Rose, Zvenko Vranesic, 1997 .

A Synthesizable Datapath-Oriented Embedded FPGA Fabric for Silicon Debug Applications

Wayne Luk, Philip Heng Wai Leong, Steven J. E. Wilton, 2008, TRETS.

Rapid estimation of power consumption for hybrid FPGAs

Wayne Luk, Philip Heng Wai Leong, Steven J. E. Wilton, 2008, 2008 International Conference on Field Programmable Logic and Applications.

Incremental Trace-Buffer Insertion for FPGA Debug

Steven J. E. Wilton, Eddie Hung, 2014, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

The architecture of dual-mode FPGA embedded system blocks

Steven J. E. Wilton, E. Lin, 2002, Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285).

Field-Programmable Gate Array Architectures

Steven J. E. Wilton, Scott Y. L. Chin, Kara K. W. Poon, 2008, Handbook of Algorithms for Physical Design Automation.

Sequential synthesizable embedded programmable logic cores for system-on-chip

Steven J. E. Wilton, Andy Yan, 2004, Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571).

On-chip FPGA Debug Instrumentation for Machine Learning Applications

Wayne Luk, Steven J. E. Wilton, Jeffrey B. Goeders, 2019, FPGA.

Embedded Programmable Logic Core Enhancements for System Bus Interfaces

Steven J. E. Wilton, Bradley R. Quinton, S. Wilton, 2007, 2007 International Conference on Field Programmable Logic and Applications.

An FPGA Architecture and CAD Flow Supporting Dynamically Controlled Power Gating

Wayne Luk, Steven J. E. Wilton, Kuen Hung Tsoi, 2016, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Introduction to the Special Section on Deep Learning in FPGAs

Steven J. E. Wilton, Deming Chen, Andrew Putnam, 2018, ACM Trans. Reconfigurable Technol. Syst..

LeFlow: Automatic Compilation of TensorFlow Machine Learning Applications to FPGAs

Steven J. E. Wilton, Bahar Salehpour, Daniel Holanda Noronha, 2018, 2018 International Conference on Field-Programmable Technology (FPT).

Accelerating trace computation in post-silicon debug

Steven J. E. Wilton, Tor M. Aamodt, Johnny J. W. Kuan, 2010, 2010 11th International Symposium on Quality Electronic Design (ISQED).

Hierarchical Benchmark Circuit Generation for FPGA Architecture Evaluation

Steven J. E. Wilton, Lesley Shannon, Scott Y. L. Chin, 2012, TECS.

In-circuit tuning of deep learning designs

Wayne Luk, Zhiqiang Que, Xinyu Niu, 2021, J. Syst. Archit..

Flexible Instrumentation for Live On-Chip Debug of Machine Learning Training on FPGAs

Wayne Luk, Zhiqiang Que, Steven J. E. Wilton, 2021, 2021 IEEE 29th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM).