Eiki Kamada

ISC Processor with Pseudo Vector Processing Feature

Kotaro Shimamura, Shigeya Tanaka, Takashi Hotta, 1995 .

A superscalar RISC processor with pseudo vector processing feature

Kotaro Shimamura, Shigeya Tanaka, Hideo Sawamoto, 1995, Proceedings of ICCD '95 International Conference on Computer Design. VLSI in Computers and Processors.

A superscalar RISC processor with 160 FPRs for large scale scientific processing

Kentaro Shimada, Eiki Kamada, Makoto Hanawa, 1999, Proceedings 1999 IEEE International Conference on Computer Design: VLSI in Computers and Processors (Cat. No.99CB37040).

A Performance and Cost Analysis of Applying Superscalar Method to Mainframe Computers

Yooichi Shintani, Eiki Kamada, Kiyoshi Inoue, 1995, IEEE Trans. Computers.

to decode data processor in a pipelined structure with the ability to execute multiple instructions in parallel and.

Kiyoshi Inoue, Eiki Kamada, Kazunori Kuriyama, 1987 .