U. Bhattacharya

Low-voltage metal-fuse technology featuring a 1.6V-programmable 1T1R bit cell with an integrated 1V charge pump in 22nm tri-gate process

K. Zhang, Z. Chen, S. H. Kulkarni, 2015, 2015 Symposium on VLSI Technology (VLSI Technology).

A New Scalable Topology for Multihop Optical Networks

U. Bhattacharya, R. Chaki, R. Chaki, 2000, ASIAN.

A 0.9um2 1T1R bit cell in 14nm SoC process for metal-fuse OTP array with hierarchical bitline, bit level redundancy, and power gating

K. Zhang, Z. Chen, S. H. Kulkarni, 2016, 2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits).

A New Multihop Logical Topology for Reliable Broadband Communication

U. Bhattacharya, R. Chaki, 2000, ASIAN.