Hansung Joo

Dynamic Vpass ISPP scheme and optimized erase Vth control for high program inhibition in MLC NAND flash memories

Myounggon Kang, Youngsun Song, Ki-Tae Park, 2009, 2009 Symposium on VLSI Circuits.

A 1.2V 1.33Gb/s/pin 8Tb NAND flash memory multi-chip package employing F-chip for low power and high performance storage applications

Jeong-Don Ihm, Yunhee Choi, Kwangwon Kim, 2017, 2017 Symposium on VLSI Circuits.