Gen Tsutsui

Emerging nanoscale silicon devices taking advantage of nanostructure physics

Masumi Saitoh, Toshiro Hiramoto, Gen Tsutsui, 2006, IBM J. Res. Dev..

Fin width scaling for improved short channel control and performance in aggressively scaled channel length SOI finFETs

Andres Bryant, Theodorus Standaert, Tenko Yamashita, 2013, 2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).

SiGe FinFET for practical logic libraries by mitigating local layout effect

Andreas Knorr, Jie Yang, John R. Sporre, 2017, 2017 Symposium on VLSI Technology.

Analytical model of body factor in short channel bulk MOSFETs for low voltage applications

Anil Kumar, Toshiro Hiramoto, Gen Tsutsui, 2004 .

Channel Geometry Impact and Narrow Sheet Effect of Stacked Nanosheet

Nicolas Loubet, Tenko Yamashita, Miaomiao Wang, 2018, 2018 IEEE International Electron Devices Meeting (IEDM).

Enhancement of adjustable threshold voltage range by substrate bias due to quantum confinement in ultrathin body SOI pMOSFETs

Toshiro Hiramoto, Gen Tsutsui, Toshiharu Nagumo, 2003 .

Aggressively scaled strained silicon directly on insulator (SSDOI) FinFETs

Pierre Morin, Frederic Allibert, Nicolas Loubet, 2013, 2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).

Superior mobility characteristics in [110]-oriented ultra thin body pMOSFETs with SOI thickness less than 6 nm

Masumi Saitoh, Toshiro Hiramoto, Gen Tsutsui, 2005, Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005..

Technology viable DC performance elements for Si/SiGe channel CMOS FinFTT

Jie Yang, Terence B. Hook, Andreas Knorr, 2016, 2016 IEEE International Electron Devices Meeting (IEDM).