Érika F. Cota

发表

A CAT Tool for Frequency-domain Testing and Diagnosis on Analog

Marcelo Lubaszewski, Érika F. Cota, José Di Elias Domênico, 1997, J. Braz. Comput. Soc..

Power-aware test scheduling in network-on-chip using variable-rate on-chip clocking

Érika F. Cota, Chunsheng Liu, Vikram Iyengar, 2005, 23rd IEEE VLSI Test Symposium (VTS'05).

A cryptography core tolerant to DFA fault attacks

Marcelo Lubaszewski, Érika F. Cota, Carlos Roberto Moratelli, 2006, SBCCI '06.

Test planning and design space exploration in a core-based environment

Luigi Carro, Marcelo Lubaszewski, Érika F. Cota, 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

Um posicionador de blocos para sistemas baseados em núcleo de hardware

Érika F. Cota, Guilherme G. Schneider, 2002 .

TI-BIST: a temperature independent analog BIST for switched-capacitor filters

Luigi Carro, Marcelo Lubaszewski, Florence Azaïs, 2000, Proceedings of the Ninth Asian Test Symposium.

Improving the Test of NoC-Based SoCs with Help of Compression Schemes

Érika F. Cota, Bruno Rouzeyre, Marie-Lise Flottes, 2008, 2008 IEEE Computer Society Annual Symposium on VLSI.

The impact of NoC reuse on the testing of core-based systems

Luigi Carro, Altamiro Amadeu Susin, Marcelo Lubaszewski, 2003, Proceedings. 21st VLSI Test Symposium, 2003..

A broad strategy to detect crosstalk faults in network-on-chip interconnects

Luigi Carro, Marcelo Lubaszewski, Érika F. Cota, 2010, 2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip.

Use Case Analysis Based on Formal Methods: An Empirical Study

Filipe Reis, Érika F. Cota, Leila Ribeiro, 2014, WADT.

Efficiently using data splitting and retransmission to tolerate faults in networks-on-chip interconnects

Marcelo Lubaszewski, Érika F. Cota, Fernanda Gusmão de Lima Kastensmidt, 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

Reusing an on-chip network for the test of core-based systems

Luigi Carro, Marcelo Lubaszewski, Érika F. Cota, 2004, TODE.

Analysis of the use of declarative languages for enhanced embedded system software development

Luigi Carro, Luís C. Lamb, Flávio Rech Wagner, 2007, SBCCI.

Using Software Metrics to Estimate the Impact of Maintenance in the Performance of Embedded Software

Érika F. Cota, Andrws Vieira, Pedro Faustini, 2014, 2014 IEEE International Conference on Software Maintenance and Evolution.

Improving mixed-single SOC testing: a power-aware reuse-based approach with analog BIST

Antonio Andrade, Marcelo Lubaszewski, Érika F. Cota, 2004, Proceedings. SBCCI 2004. 17th Symposium on Integrated Circuits and Systems Design (IEEE Cat. No.04TH8784).

Microsystems testing: an approach and open problems

Marcelo Lubaszewski, Bernard Courtois, Érika F. Cota, 1998, Proceedings Design, Automation and Test in Europe.

A method to diagnose faults in linear analog circuits using an adaptive tester

Luigi Carro, Marcelo Lubaszewski, Érika F. Cota, 1999, Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078).

NFRs early estimation through software metrics

Luigi Carro, Érika F. Cota, Andrws Vieira, 2015, 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Formal Verification of Health Assessment Tools: a Case Study

Érika F. Cota, Leila Ribeiro, Andrei Costa, 2016, Electron. Notes Theor. Comput. Sci..

A Constraint-Based Solution for On-Line Testing of Processors Embedded in Real-Time Applications

Luigi Carro, Flávio Rech Wagner, Marcelo Lubaszewski, 2005, 2005 18th Symposium on Integrated Circuits and Systems Design.

Embedded software testing: what kind of problem is this?

Érika F. Cota, 2010, DATE '10.

Evaluating SEU and crosstalk effects in network-on-chip routers

Luigi Carro, Érika F. Cota, Fernanda Gusmão de Lima Kastensmidt, 2006, 12th IEEE International On-Line Testing Symposium (IOLTS'06).

Searching for Global Test Costs Optimization in Core-Based Systems

Luigi Carro, Marcelo Lubaszewski, Érika F. Cota, 2004, J. Electron. Test..

Functional Test of Mesh-Based NoCs with Deterministic Routing: Integrating the Test of Interconnects and Routers

Marcelo Lubaszewski, Érika F. Cota, Fernanda Gusmão de Lima Kastensmidt, 2011, J. Electron. Test..

Specification of Models Based on Contexts using Graph Grammars

Érika F. Cota, Leila Ribeiro, Lucio Mauro Duarte, 2013, 2013 2nd Workshop-School on Theoretical Computer Science.

Using formal methods for content validation of medical procedure documents

Érika F. Cota, Leila Ribeiro, Andrei Costa, 2017, Int. J. Medical Informatics.

Dependable Network-on-Chip Router Able to Simultaneously Tolerate Soft Errors and Crosstalk

Luigi Carro, Érika F. Cota, Fernanda Gusmão de Lima Kastensmidt, 2006, 2006 IEEE International Test Conference.

Evaluation of SEU and crosstalk effects in network-on-chip switches

Luigi Carro, Érika F. Cota, Fernanda Gusmão de Lima Kastensmidt, 2006, SBCCI '06.

Synthesis of an 8051-Like Micro-Controller Tolerant to Transient Faults

Luigi Carro, Ricardo Reis, Marcelo Lubaszewski, 2000, J. Electron. Test..

Test scheduling for network-on-chip with BIST and precedence constraints

Dhiraj K. Pradhan, Hamid Sharif, Érika F. Cota, 2004, 2004 International Conferce on Test.

EPE‐Mobile—A framework for early performance estimation of mobile applications

Álvaro F. Moreira, Érika F. Cota, Thiago Soares Fernandes, 2018, Softw. Pract. Exp..

Crosstalk- and SEU-Aware Networks on Chips

Luigi Carro, Érika F. Cota, Fernanda Gusmão de Lima Kastensmidt, 2007, IEEE Design & Test of Computers.

Fault modeling of suspended thermal MEMS

Salvador Mir, Marcelo Lubaszewski, Bernard Courtois, 1999, International Test Conference 1999. Proceedings (IEEE Cat. No.99CH37034).

Early Estimation of NFRs for Embedded System Using Design Metrics

Luigi Carro, Érika F. Cota, Andrws Vieira, 2014, 2014 Brazilian Symposium on Computing Systems Engineering.

Improving the yield of NoC-based systems through fault diagnosis and adaptive routing

Marcelo Lubaszewski, Érika F. Cota, Fernanda Gusmão de Lima Kastensmidt, 2011, J. Parallel Distributed Comput..

Constraint-Driven Test Scheduling for NoC-Based Systems

Érika F. Cota, Chunsheng Liu, 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

A High-Fault-Coverage Approach for the Test of Data, Control and Handshake Interconnects in Mesh Networks-on-Chip

Alexandre M. Amory, Marcelo Lubaszewski, Érika F. Cota, 2008, IEEE Transactions on Computers.

Diagnosis of interconnect shorts in mesh NoCs

Marcelo Lubaszewski, Érika F. Cota, Fernanda Gusmão de Lima Kastensmidt, 2009, 2009 3rd ACM/IEEE International Symposium on Networks-on-Chip.

Reuse of existing resources for analog BIST of a switch capacitor filter.

Luigi Carro, Marcelo Lubaszewski, Florence Azaïs, 2000, DATE '00.

Reducing test time with processor reuse in network-on-chip based systems

Alexandre M. Amory, Fernando Gehm Moraes, Marcelo Lubaszewski, 2004, Proceedings. SBCCI 2004. 17th Symposium on Integrated Circuits and Systems Design (IEEE Cat. No.04TH8784).

Redefining and testing interconnect faults in Mesh NoCs

Alexandre M. Amory, Marcelo Lubaszewski, Érika F. Cota, 2007, 2007 IEEE International Test Conference.

Special session 12B: Embedded tutorial test and fault tolerance of networks-on-chip

Marcelo Lubaszewski, Érika F. Cota, 2010, 2010 28th VLSI Test Symposium (VTS).

A scalable test strategy for network-on-chip routers

Alexandre M. Amory, Fernando Gehm Moraes, Marcelo Lubaszewski, 2005, IEEE International Conference on Test, 2005..

Fault tolerant mechanism to improve yield in NoCs using a reconfigurable router

Luigi Carro, Debora Matos, Altamiro Amadeu Susin, 2009, SBCCI.

Performance Evaluation of Android Applications: A Case Study

Álvaro F. Moreira, Érika F. Cota, Thiago Soares Fernandes, 2014, 2014 Brazilian Symposium on Computing Systems Engineering.

Power-aware noc reuse on the testing of core-based systems

Luigi Carro, Flávio Rech Wagner, Marcelo Lubaszewski, 2003, International Test Conference, 2003. Proceedings. ITC 2003..

Resource-and-time-aware test strategy for configurable quaternary logic blocks

Luigi Carro, Marcelo Lubaszewski, Érika F. Cota, 2009, SBCCI.

ExecutionFlow: a tool to compute test paths of Java methods and constructors

Érika F. Cota, Keslley Silva, William Niemiec, 2021, SBES.

A fault-tolerant, DFA-resistant AES core

Marcelo Lubaszewski, Érika F. Cota, Felipe Ghellar, 2008, 2008 IEEE International Symposium on Circuits and Systems.

A new adaptive analog test and diagnosis system

Luigi Carro, Marcelo Lubaszewski, Érika F. Cota, 2000, IEEE Trans. Instrum. Meas..

A Cost-Effective Test Flow for Homogeneous Network-on-Chip

Alexandre M. Amory, Érika F. Cota, Marcelo S. Lubaszewski, 2005 .