Fu-Lung Hsueh

发表

Radiation-hardened backside-illuminated 512 x 512 charge-coupled device

John R. Tower, Philip A. Bates, Peter A. Levine, 1995, Electronic Imaging.

A peripheral switchable 3D stacked CMOS image sensor

Fu-Lung Hsueh, Szu-Ying Chen, Vincent Hsu, 2014, 2014 Symposium on VLSI Circuits Digest of Technical Papers.

Backside-illuminated 6.6-μm pixel video-rate CCDs for scientific imaging applications

John R. Tower, Peter A. Levine, Fu-Lung Hsueh, 2000, Electronic Imaging.

A 12mW all-digital PLL based on class-F DCO for 4G phones in 28nm CMOS

Fu-Lung Hsueh, Robert B. Staszewski, Masoud Babaie, 2014, 2014 Symposium on VLSI Circuits Digest of Technical Papers.

A Low-Cost Triple-Channel 10-bit 250MHz DAC IP in 65nm CMOS Process

Fu-Lung Hsueh, Wen-Shen Chou, Shu-Chieh Yang, 2007, 2007 IEEE International Symposium on Circuits and Systems.

A divider-less sub-harmonically injection-locked PLL with self-adjusted injection timing

I-Ting Lee, Shen-Iuan Liu, Fu-Lung Hsueh, 2013, 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

Session 17 overview: Diagnostic and therapeutic technologies for health: Technology directions subcommittee

Fu-Lung Hsueh, Alison Burdett, 2012, ISSCC.

A 64-channel neuron recording system

Ming-Hsien Tsai, Fu-Lung Hsueh, Wentai Liu, 2011, 2011 Annual International Conference of the IEEE Engineering in Medicine and Biology Society.

A practice of ESL verification methodology from SystemC to FPGA - using EPC Class-1 Generation-2 RFID tag design as an example

Fu-Lung Hsueh, Chua-Huang Huang, Alan P. Su, 2010, 2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC).

Session 11 overview: Emerging memory and wireless technology

Fu-Lung Hsueh, Shinichiro Mutoh, F. Hsueh, 2013, ISSCC.

2.1 An integrated 0.56THz frequency synthesizer with 21GHz locking range and −74dBc/Hz phase noise at 1MHz offset in 65nm CMOS

Gabriel Virbila, Mau-Chung Frank Chang, Fu-Lung Hsueh, 2016, 2016 IEEE International Solid-State Circuits Conference (ISSCC).

An Embedded Dynamic Voltage Scaling (DVS) System Through 55 nm Single-Inductor Dual-Output (SIDO) Switching Converter for 12-Bit Video Digital-to-Analog Converter

Ke-Horng Chen, Ying-Hsi Lin, Kuei-Ann Wen, 2012, IEEE Journal of Solid-State Circuits.

A 0.66e−rms temporal-readout-noise 3D-stacked CMOS image sensor with conditional correlated multiple sampling (CCMS) technique

Fu-Lung Hsueh, Shang-Fu Yeh, Kuo-Yu Chou, 2015, 2015 Symposium on VLSI Circuits (VLSI Circuits).

A Fully Integrated Bluetooth Low-Energy Transmitter in 28 nm CMOS With 36% System Efficiency at 3 dBm

Fu-Lung Hsueh, Robert B. Staszewski, Masoud Babaie, 2016, IEEE Journal of Solid-State Circuits.

55nm CMOS 12-bit 250MHz digital-to-analog converter with dynamic voltage scaling (DVS) technique through single-inductor dual-output (SIDO) converter

Ke-Horng Chen, Fu-Lung Hsueh, Tzu-Chi Huang, 2011, 2011 Proceedings of the ESSCIRC (ESSCIRC).

Multi-port backside illuminated CCD imagers for moderate to high frame rate camera applications

John R. Tower, Peter A. Levine, Donald J. Sauer, 1994 .

A 2.5-8Gb/s transceiver with 5-tap DFE and Second order CDR against 28-inch channel and 5000ppm SSC in 40nm CMOS technology

Wei-Chih Chen, Fu-Lung Hsueh, Chi-Chang Lu, 2010, IEEE Custom Integrated Circuits Conference 2010.

6.8 A 1.5V 33Mpixel 3D-stacked CMOS image sensor with negative substrate bias

Fu-Lung Hsueh, Charles Chih-Min Liu, Po-Sheng Chou, 2016, 2016 IEEE International Solid-State Circuits Conference (ISSCC).

10.2 A 38mW 40Gb/s 4-lane tri-band PAM-4 / 16-QAM transceiver in 28nm CMOS for high-speed Memory interface

Mau-Chung Frank Chang, Fu-Lung Hsueh, Po-Tsang Huang, 2016, 2016 IEEE International Solid-State Circuits Conference (ISSCC).

Averaging flash analog digitizer

Fu-Lung Hsueh, Andrew G Dingwall, 1993 .

A V-band divide-by-three differential direct injection-locked frequency divider in 65-nm CMOS

Yu-Ling Lin, Ming-Hsien Tsai, Fu-Lung Hsueh, 2010, IEEE Custom Integrated Circuits Conference 2010.

14.9 Sub-sampling all-digital fractional-N frequency synthesizer with −111dBc/Hz in-band phase noise and an FOM of −242dB

Yen-Hsiang Wang, Mau-Chung Frank Chang, Yan Zhao, 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.

Crosstalk metrics and the characterization of 1 . 1 m-pixel CIS

Fu-Lung Hsueh, Ren-Jie Lin, Kuo-Yu Chou, 2011 .

Analysis and design of data transmission protocol for 1024-channel retinal prosthesis

Ming-Hsien Tsai, Fu-Lung Hsueh, Wentai Liu, 2011, 2011 Annual International Conference of the IEEE Engineering in Medicine and Biology Society.

A Bluetooth low-energy (BLE) transceiver with TX/RX switchable on-chip matching network, 2.75mW high-IF discrete-time receiver, and 3.6mW all-digital transmitter

Fu-Lung Hsueh, Robert B. Staszewski, Masoud Babaie, 2016, 2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits).

A fully integrated 28nm Bluetooth Low-Energy transmitter with 36% system efficiency at 3dBm

Fu-Lung Hsueh, Robert B. Staszewski, Masoud Babaie, 2015, ESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference (ESSCIRC).