Shoji Kawahara

Pinot: speculative multi-threading processor architecture exploiting parallelism over a wide range of granularities

Satoshi Matsushita, Masamichi Takagi, Taku Ohsawa, 2005, 38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'05).

A Process and Thread Management of the Operating System "Future" for On Chip Multithreaded Architecture

Hironori Nakajo, Mikiko Sato, Mitaro Namiki, 2003, PDPTA.

Implementation and Evaluation of a Thread Library for Multithreaded Architecture

Hironori Nakajo, Mikiko Sato, Mitaro Namiki, 2003, PDPTA.

Performance Evaluation of an On-Chip Multi-Threaded Processor with Cache Memory Managed by Logical Thread Number

Hironori Nakajo, Mikiko Sato, Mitaro Namiki, 2003, PDPTA.