S. Park

A novel structure for real-time digital sample-rate converters with finite precision error analysis

S. Park, G. Hillman, R. Robles, 1991, [Proceedings] ICASSP 91: 1991 International Conference on Acoustics, Speech, and Signal Processing.

A digital receiver design for AM stereo signals using a general purpose digital signal processor

S. Park, D. M. Funderburk, 1994 .

On acoustic-echo cancellation implementation with multiple cascadable adaptive FIR filter chips

S. Park, G. Hillman, 1989, International Conference on Acoustics, Speech, and Signal Processing,.

A real-time implementation of half-band filters to obtain 18-20 bit resolution from the DSP56ADC16 sigma-delta A/D converter

S. Park, 1990, International Conference on Acoustics, Speech, and Signal Processing.

Analysis and digital implementation of jointly adapting echo canceller, transversal equalizer and decision feedback equalizer for the V.32 modem

S. Park, D. Messer, 1991, [Proceedings] ICASSP 91: 1991 International Conference on Acoustics, Speech, and Signal Processing.

A Real-time Implementation Of Key VSELP Routines on a 16-bit DSP Chip

Myung Hoon Sunwoo, S. Park, K. Terry, 1991, 1991 IEEE International Conference on Consumer Electronics.

Real-time implementation of the VSELP on a 16-bit DSP chip

Myung Hoon Sunwoo, S. Park, 1991 .

Multi-stage IIR decimation filter design technique for high resolution sigma-delta A/D converters

S. Park, W. Chen, 1992, [1992] Conference Record IEEE Instrumentation and Measurement Technology Conference.