Stephen C. Thierauf

A 100-MHz macropipelined VAX microprocessor

Ruben W. Castelino, Debra Bernstein, W. J. Bowhill, 1992 .

A 160-MHz, 32-b, O.5-W ev10s RIse Microprocessor

Richard T. Witek, Andrew J. Black, Thomas H. Lee, 1996 .

A 160 MHz 32 b 0.5 W CMOS RISC microprocessor

Richard T. Witek, Daniel W. Dobberpuhl, Andrew J. Black, 1996, 1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC.

A 100 MHz macropipelined CISC CMOS microprocessor

Ruben W. Castelino, Debra Bernstein, John H. Edmondson, 1992, 1992 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

Circuit Implementation of a 300-MHz 64-bit Second-generation CMOS Alpha CPU

William J. Bowhill, Ruben W. Castelino, Harry R. Fair, 1995, Digit. Tech. J..

High-Speed Circuit Board Signal Integrity

Stephen C. Thierauf, S. Thierauf, 2004 .