Xinjie Wei

Quick and effective buffered legitimate skew clock routing

Yici Cai, Meng Zhao, Xianlong Hong, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

Reliable buffered clock tree routing algorithm with process variation tolerance

Xianlong Hong, Yi Liu, Yici Cai, 2003, ASICON 2003.

Zero skew clock routing with tree topology construction using simulated annealing method

Yici Cai, Xianlong Hong, Xinjie Wei, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Sentiments Analysis in GitHub Repositories: An Empirical Study

Bo Yang, Chao Liu, Xinjie Wei, 2017, 2017 24th Asia-Pacific Software Engineering Conference Workshops (APSECW).

Legitimate Skew Clock Routing with Buffer Insertion

Yici Cai, Meng Zhao, Xinjie Wei, 2006, J. VLSI Signal Process..

Effective Acceleration of Iterative Slack Distribution Process

Yici Cai, Xianlong Hong, Xinjie Wei, 2007, 2007 IEEE International Symposium on Circuits and Systems.

Physical aware clock skew rescheduling

Yici Cai, Xianlong Hong, Xinjie Wei, 2007, GLSVLSI '07.

Clock skew scheduling under process variations

Yici Cai, Xianlong Hong, Xinjie Wei, 2006, 7th International Symposium on Quality Electronic Design (ISQED'06).