Jean-Christophe Le Lann

Théotime Bollengier, Loïc Lagadec, Mohamad Najem, 2018, 2018 13th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC).

Tackling Real-Time Signal Processing Applications on Shared Memory Multicore Architectures Using XPU

Jean-Christophe Le Lann, N. Khammassi, 2014 .

Communication-Aware Parallelization Strategies for High Performance Applications

Jean-Christophe Le Lann, Koen Bertels, Nader Khammassi, 2015, 2015 IEEE Computer Society Annual Symposium on VLSI.

CaRDIN: An Agile Environment for Edge Computing on Reconfigurable Sensor Networks

Loïc Lagadec, Jean-Christophe Le Lann, Noury Bouraqadi, 2016, 2016 International Conference on Computational Science and Computational Intelligence (CSCI).

An experimental toolchain based on high-level dataflow models of computation for heterogeneous MPSoC

Mickaël Raulet, Jean-François Nezan, Jean-Christophe Le Lann, 2012, Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing.

A prototyping platform for virtual reconfigurable units

Théotime Bollengier, Loïc Lagadec, Jean-Christophe Le Lann, 2014, 2014 9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC).

Model-driven toolset for embedded reconfigurable cores: Flexible prototyping and software-like debugging

Loïc Lagadec, Jean-Christophe Le Lann, Damien Picard, 2014, Sci. Comput. Program..

MoPCoM Methodology: Focus on Models of Computation

Jean-Christophe Le Lann, Vincent Leilde, Ali Koudri, 2010, ECMFA.

High-level synthesis using hierarchical conditional dependency graphs in the CODESIS system

Jean-Christophe Le Lann, Apostolos A. Kountouris, Christophe Wolinski, 2001, J. Syst. Archit..

From system-level models to heterogeneous embedded systems

Jean-Christophe Le Lann, Joël Champeau, Papa Issa Diallo, 2012 .

Demo: Overlay architectures for heterogeneous FPGA cluster management

Théotime Bollengier, Loïc Lagadec, Mohamad Najem, 2016, 2016 Conference on Design and Architectures for Signal and Image Processing (DASIP).

UML/MARTE Process for SoC/SoPC

Jean-Christophe Le Lann, Ali Koudri, Joël Champeau, 2010 .

Transient Key-based Obfuscation for HLS in an Untrusted Cloud Environment

Jean-Christophe Le Lann, Guy Gogniat, Hannah Badier, 2019, 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Early exploring design alternatives of smart sensor software with Model of Computation implemented with actors

Jean-Christophe Le Lann, Jean-Philippe Schneider, Zoé Drey, 2013 .

MHPM: Multi-Scale Hybrid Programming Model: A Flexible Parallelization Methodology

Jean-Christophe Le Lann, Jean-Philippe Diguet, Nader Khammassi, 2012, 2012 IEEE 14th International Conference on High Performance Computing and Communication & 2012 IEEE 9th International Conference on Embedded Software and Systems.

Extended overlay architectures for heterogeneous FPGA cluster management

Théotime Bollengier, Loïc Lagadec, Mohamad Najem, 2017, J. Syst. Archit..

XPU: A C++ Metaprogramming Approach to Ease Parallelism Expression: Parallelization Methodology, Internal Design and Practical Application

Jean-Christophe Le Lann, N. Khammassi, 2014 .

Opportunistic IP Birthmarking using Side Effects of Code Transformations on High-Level Synthesis

Jean-Christophe Le Lann, Guy Gogniat, Christian Pilato, 2021, 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE).

A programming toolset enabling exploitation of reconfiguration for increased flexibility in future system-on-chips

Bernard Pottier, Jean-Christophe Le Lann, Koen Bertels, 2007 .

A SYNCHRONOUS APPROACH FOR HARDWARE DESIGN

Jean-Christophe Le Lann, F. Bodin, P. Guernic, 1997 .