Ko-Min Chang

A highly robust process integration with scaled ONO interpoly dielectrics for embedded nonvolatile memory applications

H. Tseng, W. Paulson, P. Tobin, 1995 .

Study of single silicon quantum dots' band gap and single-electron charging energies by room temperature scanning tunneling microscopy.

R. Muralidhar, R. Rao, G. Bahir, 2008, Nano letters.

A 90nm Embedded 2-Bit Per Cell Nanocrystal Flash EEPROM

E. Prinz, C. Swift, Ko-Min Chang, 2006, 2006 21st IEEE Non-Volatile Semiconductor Memory Workshop.

A new scalable floating-gate EEPROM cell

S. K. Cheng, Ko-Min Chang, C. Kuo, 1992 .

A comparison of CVD stacked gate oxide and thermal gate oxide for 0.5- mu m transistors subjected to process-induced damage

H. Tseng, J. Hayden, P. Tobin, 1993 .

Embedded split-gate flash memory with silicon nanocrystals for 90nm and beyond

Ko-Min Chang, H. Gasquet, Sung-Taeg Kang, 2008, 2008 Symposium on VLSI Technology.

An embedded silicon nanocrystal nonvolatile memory for the 90nm technology node operating at 6V

E. Prinz, R. Muralidhar, C. Swift, 2004, 2004 International Conference on Integrated Circuit Design and Technology (IEEE Cat. No.04EX866).

Study of single silicon quantum dots' band gap and single-electron charging energies by room temperature scanning tunneling microscopy.

R. Muralidhar, R. Rao, G. Bahir, 2008, Nano letters.

A 6 V embedded 90 nm silicon nanocrystal nonvolatile memory

C.T. Swift, L. Parker, S. Straub, 2003, IEEE International Electron Devices Meeting 2003.