M. Steyaert

发表

SFDR-bandwidth limitations for high speed high resolution current steering CMOS D/A converters

W. Sansen, A. van den Bosch, M. Steyaert, 1999, ICECS'99. Proceedings of ICECS '99. 6th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.99EX357).

A 2-GHz low-phase-noise integrated LC-VCO set with flicker-noise upconversion minimization

G. Li Puma, M. Steyaert, B. De Muer, 2000, IEEE Journal of Solid-State Circuits.

Behavioral model for D/A converters as VSI virtual components

G. Van der Plas, W. Sansen, M. Steyaert, 1998, Proceedings of the IEEE 1998 Custom Integrated Circuits Conference (Cat. No.98CH36143).

A 800 MHz ultra low glitch energy 6-bit CMOS D/A converter

W. Sansen, M. Steyaert, A. Van den Bosch, 1998, Proceedings of the 24th European Solid-State Circuits Conference.

A Fully Integrated Class 1 Bluetooth 0.25 μm CMOS PA

M. Steyaert, K. Mertens, 2002, Proceedings of the 28th European Solid-State Circuits Conference.

Toward sub 1 V analog integrated circuits in submicron standard CMOS technologies

V. Peluso, W. Sansen, M. Steyaert, 1998, 1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC. First Edition (Cat. No.98CH36156).

A 11 mW 68dB SFDR 100 MHz bandwidth ΔΣ-DAC based on a 5-bit 1GS/s core in 130nm

M. Steyaert, P. Palmers, 2008, ESSCIRC 2008 - 34th European Solid-State Circuits Conference.

Low supply voltage fully integrated CMOS VCO with three terminals spiral inductor

M. Steyaert, B. De Muer, N. Itoh, 1999, Proceedings of the 25th European Solid-State Circuits Conference.

A simulator-optimizer for the design of very low phase noise CMOS LC-oscillators

M. Steyaert, J. Crols, B. De Muer, 1999, ICECS'99. Proceedings of ICECS '99. 6th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.99EX357).

A CMOS dual channel, 100 MHz-1.1 GHz transmitter for cable applications

M. Borremans, M. Steyaert, C. De Ranter, 1999, 1999 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC. First Edition (Cat. No.99CH36278).

A high dynamic range 3.4 GHz CMOS micropower mixer

P. Coppejans, M. Steyaert, P. Vancorenland, 2000, Proceedings of the 26th European Solid-State Circuits Conference.

A fully integrated 2 GHz LC–VCO with phase noise of –125 dBc/Hz at 600kHz

M. Steyaert, B. De Muer, C. De Ranter, 1999, Proceedings of the 25th European Solid-State Circuits Conference.

An analog integrated polyphase filter for a high performance low-IF receiver

M. Steyaert, J. Crols, M. Steyaert, 1995, Digest of Technical Papers., Symposium on VLSI Circuits..

A 14 b 150 Msample/s update rate Q/sup 2/ random walk CMOS DAC

W. Sansen, M. Steyaert, G. Van der Plas, 1999, 1999 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC. First Edition (Cat. No.99CH36278).

A 12 bit 200 MHz low glitch CMOS D/A converter

G. Van der Plas, W. Sansen, M. Steyaert, 1998, Proceedings of the IEEE 1998 Custom Integrated Circuits Conference (Cat. No.98CH36143).

Snapback circuit model for cascoded NMOS ESD over-voltage protection structures

J.-J. Yang, V. Vassilev, G. Groeseneken, 2003, ESSDERC '03. 33rd Conference on European Solid-State Device Research, 2003..

A fully integrated CMOS DCS-1800 frequency synthesizer

M. Steyaert, J. Craninckx, M. Steyaert, 1998, 1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC. First Edition (Cat. No.98CH36156).

A 1.8–V, 6–bit, 1.3–GHz CMOS flash ADC in 0.25 µm CMOS

M. Steyaert, K. Uyttenhove, 2002, Proceedings of the 28th European Solid-State Circuits Conference.

A 2.5 MSample/s multi-bit /spl Delta//spl Sigma/ CMOS ADC with 95 dB SNR

M. Steyaert, W. Sansen, Y. Geerts, 2000, 2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.00CH37056).

A 12 b accuracy 300 Msample/s update rate CMOS DAC

M. Steyaert, J. Vandenbussche, A. Van den Bosch, 1998, 1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC. First Edition (Cat. No.98CH36156).

A high-voltage output driver in a 2.5-V 0.25-/spl mu/m CMOS technology

W. Dehaene, M. Steyaert, B. Serneels, 2005, IEEE Journal of Solid-State Circuits.

A 1.3dB NF CMOS LNA for GPS with 3kV HBM ESD–protection

P. Leroux, G. Groeseneken, M. Steyaert, 2002, Proceedings of the 28th European Solid-State Circuits Conference.

A CMOS 6-bit, 1 GHz ADC for IF sampling applications

M. Steyaert, K. Uyttenhove, 2001, 2001 IEEE MTT-S International Microwave Sympsoium Digest (Cat. No.01CH37157).

Enhanced ESD protection robustness of a lateral NPN structure in the advanced CMOS

G. Groeseneken, V. Vassilev, M. Steyaert, 2004, 2004 IEEE International Reliability Physics Symposium. Proceedings.

Performance study of CMOS power amplifiers

P. Reynaert, M. Steyaert, K. Mertens, 2001, Proceedings of the 27th European Solid-State Circuits Conference.

A 100kHz – 20MHz reconfigurable nauta gm-C biquad low-pass filter in 0.13µm CMOS

M. Steyaert, J. Craninckx, P. Crombez, 2007, 2007 IEEE Asian Solid-State Circuits Conference.

A linearity and power efficient design strategy for architecture optimization of gm-C biquadratic filters

M. Steyaert, J. Craninckx, P. Crombez, 2007, 2007 Ph.D Research in Microelectronics and Electronics Conference.

Flash A/D specifications for multi-bit /spl Delta//spl Sigma/ A/D converters

M. Steyaert, Y. Geerts, 1999 .

A high-speed, direct up-conversion transmitter for cable applications using very linear 0.5 µm "Cold" CMOS mixers

M. Borremans, M. Steyaert, 1998, Proceedings of the 24th European Solid-State Circuits Conference.

A 1 GHz continuous-time sigma-delta A/D converter in 90 nm standard CMOS

W. Sansen, M. Steyaert, R. Schoofs, 2005, IEEE MTT-S International Microwave Symposium Digest, 2005..

A 700MHz, 1W fully differential class E power amplifier in CMOS

M. Steyaert, K. Mertens, B. Nauwelaers, 2000, Proceedings of the 26th European Solid-State Circuits Conference.

A 0.8 dB NF ESD-protected 9 mW CMOS LNA

P. Leroux, M. Steyaert, J. Janssens, 2001, 2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177).

A 900 mV 40 /spl mu/W switched opamp /spl Delta//spl Sigma/ modulator with 77 dB dynamic range

V. Peluso, M. Steyaert, W. Sansen, 1998, 1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC. First Edition (Cat. No.98CH36156).

Linearity guidelines for gm-C biquad filter design using architecture optimization with Volterra analysis

P. Wambacq, M. Steyaert, J. Craninckx, 2007, 2007 18th European Conference on Circuit Theory and Design.

A wideband linearisation technique for non–linear oscillators using a multi–stage polyphase filter

M. Borremans, M. Steyaert, C. De Ranter, 1999, Proceedings of the 25th European Solid-State Circuits Conference.

A CMOS 2V quadrature direct up-converter chip for DCS-1800 integration

M. Borremans, M. Steyaert, 2000, Proceedings of the 26th European Solid-State Circuits Conference.

A quadrature direct digital downconverter

P. Coppejans, M. Steyaert, P. Vancorenland, 2002, Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285).