Bharath Narasimha Swamy

Hardware/Software Helper Thread Prefetching on Heterogeneous Many Cores

Alain Ketterlin, André Seznec, Bharath Narasimha Swamy, 2014, 2014 IEEE 26th International Symposium on Computer Architecture and High Performance Computing.

Branch prediction and the performance of interpreters — Don't trust folklore

André Seznec, Erven Rohou, Bharath Narasimha Swamy, 2015, 2015 IEEE/ACM International Symposium on Code Generation and Optimization (CGO).

Manycore processor architectures

Preeti Ranjan Panda, Prasenjit Chakraborty, Bharath Narasimha Swamy, 2019 .

Exploiting heterogeneous manycores on sequential code

Bharath Narasimha Swamy, B. N. Swamy, 2015 .

DITVA: Dynamic Inter-Thread Vectorization Architecture

Sylvain Collange, André Seznec, Bharath Narasimha Swamy, 2018, J. Parallel Distributed Comput..

Impact of Serial Scaling of Multi-threaded Programs in Many-Core Era

André Seznec, Surya Narayanan, Bharath Narasimha Swamy, 2014, 2014 International Symposium on Computer Architecture and High Performance Computing Workshop.

Intercepting Functions for Memoization

Arjun Suresh, André Seznec, Erven Rohou, 2015, ACM Trans. Archit. Code Optim..

Modeling multi-threaded programs execution time in the many-core era

Bharath Narasimha Swamy, André Seznec, Surya Narayanan Natarajan, 2013 .

Exploiting heterogeneous manycores on sequential code. (Utilisation de manycores hétérogènes sur du code séquentiel)

Bharath Narasimha Swamy, 2015 .

An empirical high level performance model for future many-cores

André Seznec, Surya Narayanan, Bharath Narasimha Swamy, 2015, Conf. Computing Frontiers.

Dynamic Inter-Thread Vectorization Architecture: Extracting DLP from TLP

Sylvain Collange, André Seznec, Bharath Narasimha Swamy, 2016, 2016 28th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD).