Xin Si

发表

Application of FBG Sensing Technology on Diagnosis and Monitoring in Major Engineering Structure

Xin Si, 2005 .

Analysis of image transfer rules and the processing of BBG602 prisms

Xin Si, 2003 .

A Half-Select Disturb-Free 11T SRAM Cell With Built-In Write/Read-Assist Scheme for Ultralow-Voltage Operations

Xin Si, Bo Zhang, Shaowei Zhen, 2019, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A Reversible Data Hiding Method Using Improved Neighbor Mean Interpolation and Random-Block Division

Shunzhi Zhu, Ling Liu, Xin Si, 2014 .

24.5 A Twin-8T SRAM Computation-In-Memory Macro for Multiple-Bit CNN-Based Machine Learning

Meng-Fan Chang, Shimeng Yu, Yen-Cheng Chiu, 2019, 2019 IEEE International Solid- State Circuits Conference - (ISSCC).

Monolithic 3D+ -IC based Reconfigurable Compute-in-Memory SRAM Macro

Meng-Fan Chang, Xin Si, Cheng-Xin Xue, 2019, 2019 Symposium on VLSI Technology.

A 55nm 1-to-8 bit Configurable 6T SRAM based Computing-in-Memory Unit-Macro for CNN-based AI Edge Processors

Meng-Fan Chang, Yen-Cheng Chiu, Wei-Chen Wei, 2019, 2019 IEEE Asian Solid-State Circuits Conference (A-SSCC).

Recent Advances in Compute-in-Memory Support for SRAM Using Monolithic 3-D Integration

Meng-Fan Chang, Xin Si, Zhixiao Zhang, 2019, IEEE Micro.

Drawing of the Wavelet Package Signal Energy Eigenvalue in Damage Recognition System

Xin Si, 2006 .

A 65nm 4Kb algorithm-dependent computing-in-memory SRAM unit-macro with 2.3ns and 55.8TOPS/W fully parallel product-sum operation for binary DNN edge processors

Meng-Fan Chang, Shimeng Yu, Rui Liu, 2018, 2018 IEEE International Solid - State Circuits Conference - (ISSCC).

Structural Damage Recognition Based on BP Neural Network and Fiber Bragg Grating

Xin Si, 2005 .

Parallelizing SRAM Arrays with Customized Bit-Cell for Binary Neural Networks

Meng-Fan Chang, Xiaochen Peng, Shimeng Yu, 2018, 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC).

Parallelizing SRAM Arrays with Customized Bit-Cell for Binary Neural Networks

Meng-Fan Chang, Xiaochen Peng, Shimeng Yu, 2018, Design Automation Conference.

15.5 A 28nm 64Kb 6T SRAM Computing-in-Memory Macro with 8b MAC Operation for AI Edge Chips

Meng-Fan Chang, Qiang Li, Tzu-Hsiang Hsu, 2020, 2020 IEEE International Solid- State Circuits Conference - (ISSCC).

A Dual-Split 6T SRAM-Based Computing-in-Memory Unit-Macro With Fully Parallel Product-Sum Operation for Binarized DNN Edge Processors

Meng-Fan Chang, Qiang Li, Xin Si, 2019, IEEE Transactions on Circuits and Systems I: Regular Papers.

A Reversible Data Hiding Method Using Improved Neighbor Mean Interpolation

Shunzhi Zhu, Ling Liu, Xin Si, 2014 .

15.4 A 5.99-to-691.1TOPS/W Tensor-Train In-Memory-Computing Processor Using Bit-Level-Sparsity-Based Optimization and Variable-Precision Quantization

Xin Si, Shouyi Yin, Shaojun Wei, 2021, 2021 IEEE International Solid- State Circuits Conference (ISSCC).

Design Challenges and Methodology of High-Performance SRAM-Based Compute-in-Memory for AI Edge Devices

Xin Si, Yufei Wang, Yongliang Zhou, 2021, 2021 International Conference on UK-China Emerging Technologies (UCET).

Efficient and Robust Nonvolatile Computing-In-Memory Based on Voltage Division in 2T2R RRAM With Input-Dependent Sensing Control

Qi Liu, Xin Si, Yongpan Liu, 2021, IEEE Transactions on Circuits and Systems II: Express Briefs.

A 9.08 ENOB 10b 400MS/s Subranging SAR ADC with Subsetted CDAC and PDAS in 40nm CMOS

Xin Si, Qiang Li, Xiong Zhou, 2021, ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference (ESSCIRC).

A 40nm 1Mb 35.6 TOPS/W MLC NOR-Flash Based Computation-in-Memory Structure for Machine Learning

Xin Si, Jingjing Li, Qiang Li, 2021, 2021 IEEE International Symposium on Circuits and Systems (ISCAS).

A Local Computing Cell and 6T SRAM-Based Computing-in-Memory Macro With 8-b MAC Operation for Edge AI Chips

Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, 2021, IEEE Journal of Solid-State Circuits.

Two-Way Transpose Multibit 6T SRAM Computing-in-Memory Macro for Inference-Training AI Edge Chips

Xin Si, Shyh-Shyuan Sheu, Ting-Wei Chang, 2022, IEEE Journal of Solid-State Circuits.

16.3 A 28nm 384kb 6T-SRAM Computation-in-Memory Macro with 8b Precision for AI Edge Chips

Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, 2021, 2021 IEEE International Solid- State Circuits Conference (ISSCC).

MLFlash-CIM: Embedded Multi-Level NOR-Flash Cell based Computing in Memory Architecture for Edge AI Devices

Xin Si, Qiang Li, Chunmeng Dou, 2021, 2021 IEEE 3rd International Conference on Artificial Intelligence Circuits and Systems (AICAS).