Kang-Young Kim

A 120-mm/sup 2/ 64-Mb NAND flash memory achieving 180 ns/Byte effective program speed

Koji Hashimoto, Kang-Deog Suh, K. Kanda, 1997 .

180ns/Byte 高速書き込み可能な120mm^2 64MビットNAND EEPROM

Tae-Sung Jung, Sung-Soo Lee, Kijun Lee, 1996 .

A 60nm 6Gb/s/pin GDDR5 Graphics DRAM with Multifaceted Clocking and ISI/SSN-Reduction Techniques

Jae-Hyung Lee, Young-Hyun Jun, Dae-Hyun Kim, 2008, 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

180ns/Byte高速書き込み可能な120mm^2 64Mビット NAND EEPROM

Tae-Sung Jung, Suk-Chon Kwon, Kijun Lee, 1996 .

A 1.2 V 1.5 Gb/s 72 Mb DDR3 SRAM

Nam-Seog Kim, Sung-Tae Kim, Kwang-Jin Lee, 2003, 2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC..

A 120mm^2 64Mb NAND Flash Memory Achieving 180ns/byte Effective Program Speed

Yoichi Oshima, Kang-Deog Suh, Jin-Ki Kim, 1996 .

A 100nm Double-Stacked 500MHz 72Mb Separate-I/O Synchronous SRAM with Automatic Cell-Bias Scheme and Adaptive Block Redundancy

Young-Hyun Jun, Kyomin Sohn, Young-Ho Suh, 2008, 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.